Module lpc43xx::emc

External Memory Controller (EMC)

Modules

config	Configures operation of the memory controller.
control	Controls operation of the memory controller.
dynamicapr	Selects the last-data-out to active command time.
dynamicconfig	Selects the configuration information for dynamic memory chip select 0.
dynamiccontrol	Controls dynamic memory operation.
dynamicdal	Selects the data-in to active command time.
dynamicmrd	Selects the load mode register to active command time.
dynamicras	Selects the active to precharge command period.
dynamicrascas	Selects the RAS and CAS latencies for dynamic memory chip select 0.
dynamicrc	Selects the active to active command period.
dynamicreadconfig	Configures the dynamic memory read strategy.
dynamicrefresh	Configures dynamic memory refresh operation.
dynamicrfc	Selects the auto-refresh period.
dynamicrp	Selects the precharge command period.
dynamicrrd	Selects the active bank A to active bank B latency.
dynamicsrex	Selects the self-refresh exit time.
dynamicwr	Selects the write recovery time.
dynamicxsr	Selects the exit self-refresh to active command time.
staticconfig	Selects the memory configuration for static chip select 0.
staticextendedwait	Selects time for long static memory read and write transfers.
staticwaitoen	Selects the delay from chip select 0 or address change, whichever is later, to output enable.
staticwaitpage	Selects the delay for asynchronous page mode sequential accesses for chip select 0.
staticwaitrd	Selects the delay from chip select 0 to a read access.
staticwaitturn	Selects the number of bus turnaround cycles for chip select 0.
staticwaitwen	Selects the delay from chip select 0 to write enable.
staticwaitwr	Selects the delay from chip select 0 to a write access.
status	Provides EMC status information.

Structs

CONFIG	Configures operation of the memory controller.
CONTROL	Controls operation of the memory controller.
DYNAMICAPR	Selects the last-data-out to active command time.
DYNAMICCONFIG	Selects the configuration information for dynamic memory chip select 0.
DYNAMICCONTROL	Controls dynamic memory operation.
DYNAMICDAL	Selects the data-in to active command time.
DYNAMICMRD	Selects the load mode register to active command time.
DYNAMICRAS	Selects the active to precharge command period.
DYNAMICRASCAS	Selects the RAS and CAS latencies for dynamic memory chip select 0.
DYNAMICRC	Selects the active to active command period.
DYNAMICREADCONFIG	Configures the dynamic memory read strategy.
DYNAMICREFRESH	Configures dynamic memory refresh operation.
DYNAMICRFC	Selects the auto-refresh period.
DYNAMICRP	Selects the precharge command period.
DYNAMICRRD	Selects the active bank A to active bank B latency.
DYNAMICSREX	Selects the self-refresh exit time.
DYNAMICWR	Selects the write recovery time.
DYNAMICXSR	Selects the exit self-refresh to active command time.
RegisterBlock	Register block
STATICCONFIG	Selects the memory configuration for static chip select 0.
STATICEXTENDEDWAIT	Selects time for long static memory read and write transfers.
STATICWAITOEN	Selects the delay from chip select 0 or address change, whichever is later, to output enable.
STATICWAITPAGE	Selects the delay for asynchronous page mode sequential accesses for chip select 0.
STATICWAITRD	Selects the delay from chip select 0 to a read access.
STATICWAITTURN	Selects the number of bus turnaround cycles for chip select 0.
STATICWAITWEN	Selects the delay from chip select 0 to write enable.
STATICWAITWR	Selects the delay from chip select 0 to a write access.
STATUS	Provides EMC status information.