RegisterBlock

Struct RegisterBlock 

Source
pub struct RegisterBlock {
Show 48 fields pub sysmemremap: SYSMEMREMAP, pub presetctrl: PRESETCTRL, pub syspllctrl: SYSPLLCTRL, pub syspllstat: SYSPLLSTAT, pub usbpllctrl: USBPLLCTRL, pub usbpllstat: USBPLLSTAT, pub sysoscctrl: SYSOSCCTRL, pub wdtoscctrl: WDTOSCCTRL, pub ircctrl: IRCCTRL, pub sysresstat: SYSRESSTAT, pub syspllclksel: SYSPLLCLKSEL, pub syspllclkuen: SYSPLLCLKUEN, pub usbpllclksel: USBPLLCLKSEL, pub usbpllclkuen: USBPLLCLKUEN, pub mainclksel: MAINCLKSEL, pub mainclkuen: MAINCLKUEN, pub sysahbclkdiv: SYSAHBCLKDIV, pub sysahbclkctrl: SYSAHBCLKCTRL, pub ssp0clkdiv: SSP0CLKDIV, pub uartclkdiv: UARTCLKDIV, pub ssp1clkdiv: SSP1CLKDIV, pub traceclkdiv: TRACECLKDIV, pub systickclkdiv: SYSTICKCLKDIV, pub usbclksel: USBCLKSEL, pub usbclkuen: USBCLKUEN, pub usbclkdiv: USBCLKDIV, pub wdtclksel: WDTCLKSEL, pub wdtclkuen: WDTCLKUEN, pub wdtclkdiv: WDTCLKDIV, pub clkoutclksel: CLKOUTCLKSEL, pub clkoutuen: CLKOUTUEN, pub clkoutdiv: CLKOUTDIV, pub pioporcap0: PIOPORCAP0, pub pioporcap1: PIOPORCAP1, pub bodctrl: BODCTRL, pub systckcal: SYSTCKCAL, pub startaprp0: STARTAPRP0, pub starterp0: STARTERP0, pub startrsrp0clr: STARTRSRP0CLR, pub startsrp0: STARTSRP0, pub startaprp1: STARTAPRP1, pub starterp1: STARTERP1, pub startrsrp1clr: STARTRSRP1CLR, pub startsrp1: STARTSRP1, pub pdsleepcfg: PDSLEEPCFG, pub pdawakecfg: PDAWAKECFG, pub pdruncfg: PDRUNCFG, pub device_id: DEVICE_ID, /* private fields */
}
Expand description

Register block

Fields§

§sysmemremap: SYSMEMREMAP

0x00 - System memory remap

§presetctrl: PRESETCTRL

0x04 - Peripheral reset control

§syspllctrl: SYSPLLCTRL

0x08 - System PLL control

§syspllstat: SYSPLLSTAT

0x0c - System PLL status

§usbpllctrl: USBPLLCTRL

0x10 - USB PLL control

§usbpllstat: USBPLLSTAT

0x14 - USB PLL status

§sysoscctrl: SYSOSCCTRL

0x20 - System oscillator control

§wdtoscctrl: WDTOSCCTRL

0x24 - Watchdog oscillator control

§ircctrl: IRCCTRL

0x28 - IRC control

§sysresstat: SYSRESSTAT

0x30 - System reset status register

§syspllclksel: SYSPLLCLKSEL

0x40 - System PLL clock source select

§syspllclkuen: SYSPLLCLKUEN

0x44 - System PLL clock source update enable

§usbpllclksel: USBPLLCLKSEL

0x48 - USB PLL clock source select

§usbpllclkuen: USBPLLCLKUEN

0x4c - USB PLL clock source update enable

§mainclksel: MAINCLKSEL

0x70 - Main clock source select

§mainclkuen: MAINCLKUEN

0x74 - Main clock source update enable

§sysahbclkdiv: SYSAHBCLKDIV

0x78 - System AHB clock divider

§sysahbclkctrl: SYSAHBCLKCTRL

0x80 - System AHB clock control

§ssp0clkdiv: SSP0CLKDIV

0x94 - SSP clock divder

§uartclkdiv: UARTCLKDIV

0x98 - UART clock divder

§ssp1clkdiv: SSP1CLKDIV

0x9c - SPISP1 clock divder

§traceclkdiv: TRACECLKDIV

0xac - ARM trace clock divider

§systickclkdiv: SYSTICKCLKDIV

0xb0 - SYSTICK clock divder

§usbclksel: USBCLKSEL

0xc0 - USB clock source select

§usbclkuen: USBCLKUEN

0xc4 - USB clock source update enable

§usbclkdiv: USBCLKDIV

0xc8 - USB clock source divider

§wdtclksel: WDTCLKSEL

0xd0 - WDT clock source select

§wdtclkuen: WDTCLKUEN

0xd4 - WDT clock source update enable

§wdtclkdiv: WDTCLKDIV

0xd8 - WDT clock divider

§clkoutclksel: CLKOUTCLKSEL

0xe0 - CLKOUT clock source select

§clkoutuen: CLKOUTUEN

0xe4 - CLKOUT clock source update enable

§clkoutdiv: CLKOUTDIV

0xe8 - CLKOUT clock divider

§pioporcap0: PIOPORCAP0

0x100 - POR captured PIO status 0

§pioporcap1: PIOPORCAP1

0x104 - POR captured PIO status 1

§bodctrl: BODCTRL

0x150 - BOD control

§systckcal: SYSTCKCAL

0x154 - System tick counter calibration

§startaprp0: STARTAPRP0

0x200 - Start logic edge control register 0; bottom 32 interrupts

§starterp0: STARTERP0

0x204 - Start logic signal enable register 0; bottom 32 interrupts

§startrsrp0clr: STARTRSRP0CLR

0x208 - Start logic reset register 0; bottom 32 interrupts

§startsrp0: STARTSRP0

0x20c - Start logic status register 0; bottom 32 interrupts

§startaprp1: STARTAPRP1

0x210 - Start logic edge control register 1; top 8 interrupts

§starterp1: STARTERP1

0x214 - Start logic signal enable register 1; top 8 interrupts

§startrsrp1clr: STARTRSRP1CLR

0x218 - Start logic reset register 1; top 8 interrupts

§startsrp1: STARTSRP1

0x21c - Start logic status register 1; top 8 interrupts

§pdsleepcfg: PDSLEEPCFG

0x230 - Power-down states in Deep-sleep mode

§pdawakecfg: PDAWAKECFG

0x234 - Power-down states after wake-up from Deep-sleep mode

§pdruncfg: PDRUNCFG

0x238 - Power-down configuration register

§device_id: DEVICE_ID

0x3f4 - Device ID

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