[][src]Struct ksz8863::smi::Map

pub struct Map { /* fields omitted */ }

A map of the state of all registers in the impl_registers invocation.

Implementations

impl Map[src]

pub const LEN: usize[src]

The total number of documented registers in the TMC2209.

pub fn reg<T>(&self) -> &T where
    T: 'static + Register
[src]

Read-only access to the register of the given type.

pub fn reg_mut<T>(&mut self) -> &mut T where
    T: 'static + Register
[src]

Mutable access to the register of the given type.

pub fn state(&self, addr: Address) -> &State[src]

Read-only access to the dynamic representation of the register state at the given address.

pub fn set_state(&mut self, state: State)[src]

Update the given register state.

pub fn chip_id0(&mut self) -> &mut ChipId0[src]

pub fn chip_id1(&mut self) -> &mut ChipId1[src]

pub fn gc0(&mut self) -> &mut Gc0[src]

pub fn gc1(&mut self) -> &mut Gc1[src]

pub fn gc2(&mut self) -> &mut Gc2[src]

pub fn gc3(&mut self) -> &mut Gc3[src]

pub fn gc4(&mut self) -> &mut Gc4[src]

pub fn gc5(&mut self) -> &mut Gc5[src]

pub fn gc9(&mut self) -> &mut Gc9[src]

pub fn gc10(&mut self) -> &mut Gc10[src]

pub fn gc11(&mut self) -> &mut Gc11[src]

pub fn gc12(&mut self) -> &mut Gc12[src]

pub fn gc13(&mut self) -> &mut Gc13[src]

pub fn port1_ctrl0(&mut self) -> &mut Port1Ctrl0[src]

pub fn port1_ctrl1(&mut self) -> &mut Port1Ctrl1[src]

pub fn port1_ctrl2(&mut self) -> &mut Port1Ctrl2[src]

pub fn port1_ctrl3(&mut self) -> &mut Port1Ctrl3[src]

pub fn port1_ctrl4(&mut self) -> &mut Port1Ctrl4[src]

pub fn port1_ctrl5(&mut self) -> &mut Port1Ctrl5[src]

pub fn port1_q0_ingress_rate_limit(&mut self) -> &mut Port1Q0IngressRateLimit[src]

pub fn port1_q1_ingress_rate_limit(&mut self) -> &mut Port1Q1IngressRateLimit[src]

pub fn port1_q2_ingress_rate_limit(&mut self) -> &mut Port1Q2IngressRateLimit[src]

pub fn port1_q3_ingress_rate_limit(&mut self) -> &mut Port1Q3IngressRateLimit[src]

pub fn port1_phy_special(&mut self) -> &mut Port1PhySpecial[src]

pub fn port1_ctrl12(&mut self) -> &mut Port1Ctrl12[src]

pub fn port1_ctrl13(&mut self) -> &mut Port1Ctrl13[src]

pub fn port1_status0(&mut self) -> &mut Port1Status0[src]

pub fn port1_status1(&mut self) -> &mut Port1Status1[src]

pub fn port2_ctrl0(&mut self) -> &mut Port2Ctrl0[src]

pub fn port2_ctrl1(&mut self) -> &mut Port2Ctrl1[src]

pub fn port2_ctrl2(&mut self) -> &mut Port2Ctrl2[src]

pub fn port2_ctrl3(&mut self) -> &mut Port2Ctrl3[src]

pub fn port2_ctrl4(&mut self) -> &mut Port2Ctrl4[src]

pub fn port2_ctrl5(&mut self) -> &mut Port2Ctrl5[src]

pub fn port2_q0_ingress_rate_limit(&mut self) -> &mut Port2Q0IngressRateLimit[src]

pub fn port2_q1_ingress_rate_limit(&mut self) -> &mut Port2Q1IngressRateLimit[src]

pub fn port2_q2_ingress_rate_limit(&mut self) -> &mut Port2Q2IngressRateLimit[src]

pub fn port2_q3_ingress_rate_limit(&mut self) -> &mut Port2Q3IngressRateLimit[src]

pub fn port2_phy_special(&mut self) -> &mut Port2PhySpecial[src]

pub fn port2_ctrl12(&mut self) -> &mut Port2Ctrl12[src]

pub fn port2_ctrl13(&mut self) -> &mut Port2Ctrl13[src]

pub fn port2_status0(&mut self) -> &mut Port2Status0[src]

pub fn port2_status1(&mut self) -> &mut Port2Status1[src]

pub fn port3_ctrl0(&mut self) -> &mut Port3Ctrl0[src]

pub fn port3_ctrl1(&mut self) -> &mut Port3Ctrl1[src]

pub fn port3_ctrl2(&mut self) -> &mut Port3Ctrl2[src]

pub fn port3_ctrl3(&mut self) -> &mut Port3Ctrl3[src]

pub fn port3_ctrl4(&mut self) -> &mut Port3Ctrl4[src]

pub fn port3_ctrl5(&mut self) -> &mut Port3Ctrl5[src]

pub fn port3_q0_ingress_rate_limit(&mut self) -> &mut Port3Q0IngressRateLimit[src]

pub fn port3_q1_ingress_rate_limit(&mut self) -> &mut Port3Q1IngressRateLimit[src]

pub fn port3_q2_ingress_rate_limit(&mut self) -> &mut Port3Q2IngressRateLimit[src]

pub fn port3_q3_ingress_rate_limit(&mut self) -> &mut Port3Q3IngressRateLimit[src]

pub fn port3_status1(&mut self) -> &mut Port3Status1[src]

pub fn reset(&mut self) -> &mut Reset[src]

pub fn tos_priority_ctrl_0(&mut self) -> &mut TosPriorityCtrl0[src]

pub fn tos_priority_ctrl_1(&mut self) -> &mut TosPriorityCtrl1[src]

pub fn tos_priority_ctrl_2(&mut self) -> &mut TosPriorityCtrl2[src]

pub fn tos_priority_ctrl_3(&mut self) -> &mut TosPriorityCtrl3[src]

pub fn tos_priority_ctrl_4(&mut self) -> &mut TosPriorityCtrl4[src]

pub fn tos_priority_ctrl_5(&mut self) -> &mut TosPriorityCtrl5[src]

pub fn tos_priority_ctrl_6(&mut self) -> &mut TosPriorityCtrl6[src]

pub fn tos_priority_ctrl_7(&mut self) -> &mut TosPriorityCtrl7[src]

pub fn tos_priority_ctrl_8(&mut self) -> &mut TosPriorityCtrl8[src]

pub fn tos_priority_ctrl_9(&mut self) -> &mut TosPriorityCtrl9[src]

pub fn tos_priority_ctrl_10(&mut self) -> &mut TosPriorityCtrl10[src]

pub fn tos_priority_ctrl_11(&mut self) -> &mut TosPriorityCtrl11[src]

pub fn tos_priority_ctrl_12(&mut self) -> &mut TosPriorityCtrl12[src]

pub fn tos_priority_ctrl_13(&mut self) -> &mut TosPriorityCtrl13[src]

pub fn tos_priority_ctrl_14(&mut self) -> &mut TosPriorityCtrl14[src]

pub fn tos_priority_ctrl_15(&mut self) -> &mut TosPriorityCtrl15[src]

pub fn mac_addr_0(&mut self) -> &mut MacAddr0[src]

pub fn mac_addr_1(&mut self) -> &mut MacAddr1[src]

pub fn mac_addr_2(&mut self) -> &mut MacAddr2[src]

pub fn mac_addr_3(&mut self) -> &mut MacAddr3[src]

pub fn mac_addr_4(&mut self) -> &mut MacAddr4[src]

pub fn mac_addr_5(&mut self) -> &mut MacAddr5[src]

pub fn user_def1(&mut self) -> &mut UserDef1[src]

pub fn user_def2(&mut self) -> &mut UserDef2[src]

pub fn user_def3(&mut self) -> &mut UserDef3[src]

pub fn indirect_access_ctrl0(&mut self) -> &mut IndirectAccessCtrl0[src]

pub fn indirect_access_ctrl1(&mut self) -> &mut IndirectAccessCtrl1[src]

pub fn indirect_data8(&mut self) -> &mut IndirectData8[src]

pub fn indirect_data7(&mut self) -> &mut IndirectData7[src]

pub fn indirect_data6(&mut self) -> &mut IndirectData6[src]

pub fn indirect_data5(&mut self) -> &mut IndirectData5[src]

pub fn indirect_data4(&mut self) -> &mut IndirectData4[src]

pub fn indirect_data3(&mut self) -> &mut IndirectData3[src]

pub fn indirect_data2(&mut self) -> &mut IndirectData2[src]

pub fn indirect_data1(&mut self) -> &mut IndirectData1[src]

pub fn indirect_data0(&mut self) -> &mut IndirectData0[src]

pub fn station1_mac_addr0(&mut self) -> &mut Station1MacAddr0[src]

pub fn station1_mac_addr1(&mut self) -> &mut Station1MacAddr1[src]

pub fn station1_mac_addr2(&mut self) -> &mut Station1MacAddr2[src]

pub fn station1_mac_addr3(&mut self) -> &mut Station1MacAddr3[src]

pub fn station1_mac_addr4(&mut self) -> &mut Station1MacAddr4[src]

pub fn station1_mac_addr5(&mut self) -> &mut Station1MacAddr5[src]

pub fn station2_mac_addr0(&mut self) -> &mut Station2MacAddr0[src]

pub fn station2_mac_addr1(&mut self) -> &mut Station2MacAddr1[src]

pub fn station2_mac_addr2(&mut self) -> &mut Station2MacAddr2[src]

pub fn station2_mac_addr3(&mut self) -> &mut Station2MacAddr3[src]

pub fn station2_mac_addr4(&mut self) -> &mut Station2MacAddr4[src]

pub fn station2_mac_addr5(&mut self) -> &mut Station2MacAddr5[src]

pub fn mode(&mut self) -> &mut Mode[src]

pub fn high_priority_packet_buffer_q3(
    &mut self
) -> &mut HighPriorityPacketBufferQ3
[src]

pub fn high_priority_packet_buffer_q2(
    &mut self
) -> &mut HighPriorityPacketBufferQ2
[src]

pub fn high_priority_packet_buffer_q1(
    &mut self
) -> &mut HighPriorityPacketBufferQ1
[src]

pub fn high_priority_packet_buffer_q0(
    &mut self
) -> &mut HighPriorityPacketBufferQ0
[src]

pub fn pm_usage_flow_ctrl_select_mode_1(
    &mut self
) -> &mut PmUsageFlowCtrlSelectMode1
[src]

pub fn pm_usage_flow_ctrl_select_mode_2(
    &mut self
) -> &mut PmUsageFlowCtrlSelectMode2
[src]

pub fn pm_usage_flow_ctrl_select_mode_3(
    &mut self
) -> &mut PmUsageFlowCtrlSelectMode3
[src]

pub fn pm_usage_flow_ctrl_select_mode_4(
    &mut self
) -> &mut PmUsageFlowCtrlSelectMode4
[src]

pub fn port1_txq_split_for_q3(&mut self) -> &mut Port1TxqSplitForQ3[src]

pub fn port1_txq_split_for_q2(&mut self) -> &mut Port1TxqSplitForQ2[src]

pub fn port1_txq_split_for_q1(&mut self) -> &mut Port1TxqSplitForQ1[src]

pub fn port1_txq_split_for_q0(&mut self) -> &mut Port1TxqSplitForQ0[src]

pub fn port2_txq_split_for_q3(&mut self) -> &mut Port2TxqSplitForQ3[src]

pub fn port2_txq_split_for_q2(&mut self) -> &mut Port2TxqSplitForQ2[src]

pub fn port2_txq_split_for_q1(&mut self) -> &mut Port2TxqSplitForQ1[src]

pub fn port2_txq_split_for_q0(&mut self) -> &mut Port2TxqSplitForQ0[src]

pub fn port3_txq_split_for_q3(&mut self) -> &mut Port3TxqSplitForQ3[src]

pub fn port3_txq_split_for_q2(&mut self) -> &mut Port3TxqSplitForQ2[src]

pub fn port3_txq_split_for_q1(&mut self) -> &mut Port3TxqSplitForQ1[src]

pub fn port3_txq_split_for_q0(&mut self) -> &mut Port3TxqSplitForQ0[src]

pub fn interrupt_enable(&mut self) -> &mut InterruptEnable[src]

pub fn force_pause_off(&mut self) -> &mut ForcePauseOff[src]

pub fn fiber_signal_threshold(&mut self) -> &mut FiberSignalThreshold[src]

pub fn internal_ldo_ctrl(&mut self) -> &mut InternalLdoCtrl[src]

pub fn insert_src_pvid(&mut self) -> &mut InsertSrcPvid[src]

pub fn pwr_mgmt_and_led_mode(&mut self) -> &mut PwrMgmtAndLedMode[src]

pub fn sleep_mode(&mut self) -> &mut SleepMode[src]

pub fn fwd_invalid_vid_frame_and_host_mode(
    &mut self
) -> &mut FwdInvalidVidFrameAndHostMode
[src]

Trait Implementations

impl Clone for Map[src]

impl Debug for Map[src]

impl Default for Map[src]

impl Eq for Map[src]

impl Hash for Map[src]

impl Index<Address> for Map[src]

type Output = State

The returned type after indexing.

impl IndexMut<Address> for Map[src]

impl PartialEq<Map> for Map[src]

impl Read for Map[src]

type Error = InvalidAddress

Errors that might occur on the SMI interface.

impl StructuralEq for Map[src]

impl StructuralPartialEq for Map[src]

impl Write for Map[src]

type Error = InvalidAddress

Errors that might occur on the SMI interface.

Auto Trait Implementations

impl Send for Map[src]

impl Sync for Map[src]

impl Unpin for Map[src]

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Borrow<T> for T where
    T: ?Sized
[src]

impl<T> BorrowMut<T> for T where
    T: ?Sized
[src]

impl<T> Conv for T

impl<T> Conv for T

impl<T> FmtForward for T

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T> Pipe for T where
    T: ?Sized

impl<T> Pipe for T

impl<T> PipeAsRef for T

impl<T> PipeBorrow for T

impl<T> PipeDeref for T

impl<T> PipeRef for T

impl<T> Tap for T

impl<T> Tap for T

impl<T, U> TapAsRef<U> for T where
    U: ?Sized

impl<T, U> TapBorrow<U> for T where
    U: ?Sized

impl<T> TapDeref for T

impl<T> TryConv for T

impl<T> TryConv for T

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.