[−][src]Type Definition imxrt1062_can1::ctrl1::R
type R = R<u32, CTRL1>;
Reader of register CTRL1
Methods
impl R
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pub fn propseg(&self) -> PROPSEG_R
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Bits 0:2 - This 3-bit field defines the length of the Propagation Segment in the bit time
pub fn lom(&self) -> LOM_R
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Bit 3 - This bit configures FLEXCAN to operate in Listen Only Mode
pub fn lbuf(&self) -> LBUF_R
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Bit 4 - This bit defines the ordering mechanism for Message Buffer transmission
pub fn tsyn(&self) -> TSYN_R
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Bit 5 - This bit enables a mechanism that resets the free-running timer each time a message is received in Message Buffer 0
pub fn boffrec(&self) -> BOFFREC_R
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Bit 6 - This bit defines how FLEXCAN recovers from Bus Off state
pub fn smp(&self) -> SMP_R
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Bit 7 - This bit defines the sampling mode of CAN bits at the FLEXCAN_RX
pub fn rwrnmsk(&self) -> RWRNMSK_R
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Bit 10 - This bit provides a mask for the Rx Warning Interrupt associated with the RWRN_INT flag in the Error and Status Register
pub fn twrnmsk(&self) -> TWRNMSK_R
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Bit 11 - This bit provides a mask for the Tx Warning Interrupt associated with the TWRN_INT flag in the Error and Status Register
pub fn lpb(&self) -> LPB_R
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Bit 12 - This bit configures FlexCAN to operate in Loop-Back Mode
pub fn errmsk(&self) -> ERRMSK_R
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Bit 14 - This bit provides a mask for the Error Interrupt.
pub fn boffmsk(&self) -> BOFFMSK_R
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Bit 15 - This bit provides a mask for the Bus Off Interrupt.
pub fn pseg2(&self) -> PSEG2_R
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Bits 16:18 - This 3-bit field defines the length of Phase Buffer Segment 2 in the bit time
pub fn pseg1(&self) -> PSEG1_R
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Bits 19:21 - This 3-bit field defines the length of Phase Buffer Segment 1 in the bit time
pub fn rjw(&self) -> RJW_R
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Bits 22:23 - This 2-bit field defines the maximum number of time quanta One time quantum is equal to the Sclock period
pub fn presdiv(&self) -> PRESDIV_R
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Bits 24:31 - This 8-bit field defines the ratio between the PE clock frequency and the Serial Clock (Sclock) frequency