Struct imxrt1062_can1::R

pub struct R<U, T> { /* fields omitted */ }

Register/field reader

Result of the read method of a register. Also it can be used in the modify method

Methods

impl<U, T> R<U, T> where
    U: Copy, 

pub fn bits(&self) -> U

Read raw bits from register/field

impl<FI> R<bool, FI>

pub fn bit(&self) -> bool

Value of the field as raw bits

pub fn bit_is_clear(&self) -> bool

Returns true if the bit is clear (0)

pub fn bit_is_set(&self) -> bool

Returns true if the bit is set (1)

impl R<u8, IDAM_A>

pub fn variant(&self) -> IDAM_A

Get enumerated values variant

pub fn is_idam_0(&self) -> bool

Checks if the value of the field is IDAM_0

pub fn is_idam_1(&self) -> bool

Checks if the value of the field is IDAM_1

pub fn is_idam_2(&self) -> bool

Checks if the value of the field is IDAM_2

pub fn is_idam_3(&self) -> bool

Checks if the value of the field is IDAM_3

impl R<bool, AEN_A>

pub fn variant(&self) -> AEN_A

Get enumerated values variant

pub fn is_aen_0(&self) -> bool

Checks if the value of the field is AEN_0

pub fn is_aen_1(&self) -> bool

Checks if the value of the field is AEN_1

impl R<bool, LPRIOEN_A>

pub fn variant(&self) -> LPRIOEN_A

Get enumerated values variant

pub fn is_lprioen_0(&self) -> bool

Checks if the value of the field is LPRIOEN_0

pub fn is_lprioen_1(&self) -> bool

Checks if the value of the field is LPRIOEN_1

impl R<bool, IRMQ_A>

pub fn variant(&self) -> IRMQ_A

Get enumerated values variant

pub fn is_irmq_0(&self) -> bool

Checks if the value of the field is IRMQ_0

pub fn is_irmq_1(&self) -> bool

Checks if the value of the field is IRMQ_1

impl R<bool, SRXDIS_A>

pub fn variant(&self) -> SRXDIS_A

Get enumerated values variant

pub fn is_srxdis_0(&self) -> bool

Checks if the value of the field is SRXDIS_0

pub fn is_srxdis_1(&self) -> bool

Checks if the value of the field is SRXDIS_1

impl R<bool, WAKSRC_A>

pub fn variant(&self) -> WAKSRC_A

Get enumerated values variant

pub fn is_waksrc_0(&self) -> bool

Checks if the value of the field is WAKSRC_0

pub fn is_waksrc_1(&self) -> bool

Checks if the value of the field is WAKSRC_1

impl R<bool, LPMACK_A>

pub fn variant(&self) -> LPMACK_A

Get enumerated values variant

pub fn is_lpmack_0(&self) -> bool

Checks if the value of the field is LPMACK_0

pub fn is_lpmack_1(&self) -> bool

Checks if the value of the field is LPMACK_1

impl R<bool, WRNEN_A>

pub fn variant(&self) -> WRNEN_A

Get enumerated values variant

pub fn is_wrnen_0(&self) -> bool

Checks if the value of the field is WRNEN_0

pub fn is_wrnen_1(&self) -> bool

Checks if the value of the field is WRNEN_1

impl R<bool, SLFWAK_A>

pub fn variant(&self) -> SLFWAK_A

Get enumerated values variant

pub fn is_slfwak_0(&self) -> bool

Checks if the value of the field is SLFWAK_0

pub fn is_slfwak_1(&self) -> bool

Checks if the value of the field is SLFWAK_1

impl R<bool, SUPV_A>

pub fn variant(&self) -> SUPV_A

Get enumerated values variant

pub fn is_supv_0(&self) -> bool

Checks if the value of the field is SUPV_0

pub fn is_supv_1(&self) -> bool

Checks if the value of the field is SUPV_1

impl R<bool, FRZACK_A>

pub fn variant(&self) -> FRZACK_A

Get enumerated values variant

pub fn is_frzack_0(&self) -> bool

Checks if the value of the field is FRZACK_0

pub fn is_frzack_1(&self) -> bool

Checks if the value of the field is FRZACK_1

impl R<bool, SOFTRST_A>

pub fn variant(&self) -> SOFTRST_A

Get enumerated values variant

pub fn is_softrst_0(&self) -> bool

Checks if the value of the field is SOFTRST_0

pub fn is_softrst_1(&self) -> bool

Checks if the value of the field is SOFTRST_1

impl R<bool, WAKMSK_A>

pub fn variant(&self) -> WAKMSK_A

Get enumerated values variant

pub fn is_wakmsk_0(&self) -> bool

Checks if the value of the field is WAKMSK_0

pub fn is_wakmsk_1(&self) -> bool

Checks if the value of the field is WAKMSK_1

impl R<bool, NOTRDY_A>

pub fn variant(&self) -> NOTRDY_A

Get enumerated values variant

pub fn is_notrdy_0(&self) -> bool

Checks if the value of the field is NOTRDY_0

pub fn is_notrdy_1(&self) -> bool

Checks if the value of the field is NOTRDY_1

impl R<bool, HALT_A>

pub fn variant(&self) -> HALT_A

Get enumerated values variant

pub fn is_halt_0(&self) -> bool

Checks if the value of the field is HALT_0

pub fn is_halt_1(&self) -> bool

Checks if the value of the field is HALT_1

impl R<bool, RFEN_A>

pub fn variant(&self) -> RFEN_A

Get enumerated values variant

pub fn is_rfen_0(&self) -> bool

Checks if the value of the field is RFEN_0

pub fn is_rfen_1(&self) -> bool

Checks if the value of the field is RFEN_1

impl R<bool, FRZ_A>

pub fn variant(&self) -> FRZ_A

Get enumerated values variant

pub fn is_frz_0(&self) -> bool

Checks if the value of the field is FRZ_0

pub fn is_frz_1(&self) -> bool

Checks if the value of the field is FRZ_1

impl R<bool, MDIS_A>

pub fn variant(&self) -> MDIS_A

Get enumerated values variant

pub fn is_mdis_0(&self) -> bool

Checks if the value of the field is MDIS_0

pub fn is_mdis_1(&self) -> bool

Checks if the value of the field is MDIS_1

impl R<u32, Reg<u32, _MCR>>

pub fn maxmb(&self) -> MAXMB_R

Bits 0:6 - This 7-bit field defines the number of the last Message Buffers that will take part in the matching and arbitration processes

pub fn idam(&self) -> IDAM_R

Bits 8:9 - This 2-bit field identifies the format of the elements of the Rx FIFO filter table, as shown below

pub fn aen(&self) -> AEN_R

Bit 12 - This bit is supplied for backwards compatibility reasons

pub fn lprioen(&self) -> LPRIOEN_R

Bit 13 - This bit is provided for backwards compatibility reasons

pub fn irmq(&self) -> IRMQ_R

Bit 16 - This bit indicates whether Rx matching process will be based either on individual masking and queue or on masking scheme with RXMGMASK, RX14MASK and RX15MASK, RXFGMASK

pub fn srxdis(&self) -> SRXDIS_R

Bit 17 - This bit defines whether FlexCAN is allowed to receive frames transmitted by itself

pub fn waksrc(&self) -> WAKSRC_R

Bit 19 - This bit defines whether the integrated low-pass filter is applied to protect the FLEXCAN_RX input from spurious wake up

pub fn lpmack(&self) -> LPMACK_R

Bit 20 - This read-only bit indicates that FLEXCAN is either in Disable Mode or Stop Mode

pub fn wrnen(&self) -> WRNEN_R

Bit 21 - When asserted, this bit enables the generation of the TWRN_INT and RWRN_INT flags in the Error and Status Register

pub fn slfwak(&self) -> SLFWAK_R

Bit 22 - This bit enables the Self Wake Up feature when FLEXCAN is in Stop Mode

pub fn supv(&self) -> SUPV_R

Bit 23 - This bit configures some of the FLEXCAN registers to be either in Supervisor or User Mode

pub fn frzack(&self) -> FRZACK_R

Bit 24 - This read-only bit indicates that FLEXCAN is in Freeze Mode and its prescaler is stopped

pub fn softrst(&self) -> SOFTRST_R

Bit 25 - When this bit is asserted, FlexCAN resets its internal state machines and some of the memory mapped registers

pub fn wakmsk(&self) -> WAKMSK_R

Bit 26 - This bit enables the Wake Up Interrupt generation.

pub fn notrdy(&self) -> NOTRDY_R

Bit 27 - This read-only bit indicates that FLEXCAN is either in Disable Mode, Stop Mode or Freeze Mode

pub fn halt(&self) -> HALT_R

Bit 28 - Assertion of this bit puts the FLEXCAN module into Freeze Mode

pub fn rfen(&self) -> RFEN_R

Bit 29 - This bit controls whether the Rx FIFO feature is enabled or not

pub fn frz(&self) -> FRZ_R

Bit 30 - The FRZ bit specifies the FLEXCAN behavior when the HALT bit in the MCR Register is set or when Debug Mode is requested at Arm level

pub fn mdis(&self) -> MDIS_R

Bit 31 - This bit controls whether FLEXCAN is enabled or not

impl R<bool, LOM_A>

pub fn variant(&self) -> LOM_A

Get enumerated values variant

pub fn is_lom_0(&self) -> bool

Checks if the value of the field is LOM_0

pub fn is_lom_1(&self) -> bool

Checks if the value of the field is LOM_1

impl R<bool, LBUF_A>

pub fn variant(&self) -> LBUF_A

Get enumerated values variant

pub fn is_lbuf_0(&self) -> bool

Checks if the value of the field is LBUF_0

pub fn is_lbuf_1(&self) -> bool

Checks if the value of the field is LBUF_1

impl R<bool, TSYN_A>

pub fn variant(&self) -> TSYN_A

Get enumerated values variant

pub fn is_tsyn_0(&self) -> bool

Checks if the value of the field is TSYN_0

pub fn is_tsyn_1(&self) -> bool

Checks if the value of the field is TSYN_1

impl R<bool, BOFFREC_A>

pub fn variant(&self) -> BOFFREC_A

Get enumerated values variant

pub fn is_boffrec_0(&self) -> bool

Checks if the value of the field is BOFFREC_0

pub fn is_boffrec_1(&self) -> bool

Checks if the value of the field is BOFFREC_1

impl R<bool, SMP_A>

pub fn variant(&self) -> SMP_A

Get enumerated values variant

pub fn is_smp_0(&self) -> bool

Checks if the value of the field is SMP_0

pub fn is_smp_1(&self) -> bool

Checks if the value of the field is SMP_1

impl R<bool, RWRNMSK_A>

pub fn variant(&self) -> RWRNMSK_A

Get enumerated values variant

pub fn is_rwrnmsk_0(&self) -> bool

Checks if the value of the field is RWRNMSK_0

pub fn is_rwrnmsk_1(&self) -> bool

Checks if the value of the field is RWRNMSK_1

impl R<bool, TWRNMSK_A>

pub fn variant(&self) -> TWRNMSK_A

Get enumerated values variant

pub fn is_twrnmsk_0(&self) -> bool

Checks if the value of the field is TWRNMSK_0

pub fn is_twrnmsk_1(&self) -> bool

Checks if the value of the field is TWRNMSK_1

impl R<bool, LPB_A>

pub fn variant(&self) -> LPB_A

Get enumerated values variant

pub fn is_lpb_0(&self) -> bool

Checks if the value of the field is LPB_0

pub fn is_lpb_1(&self) -> bool

Checks if the value of the field is LPB_1

impl R<bool, ERRMSK_A>

pub fn variant(&self) -> ERRMSK_A

Get enumerated values variant

pub fn is_errmsk_0(&self) -> bool

Checks if the value of the field is ERRMSK_0

pub fn is_errmsk_1(&self) -> bool

Checks if the value of the field is ERRMSK_1

impl R<bool, BOFFMSK_A>

pub fn variant(&self) -> BOFFMSK_A

Get enumerated values variant

pub fn is_boffmsk_0(&self) -> bool

Checks if the value of the field is BOFFMSK_0

pub fn is_boffmsk_1(&self) -> bool

Checks if the value of the field is BOFFMSK_1

impl R<u32, Reg<u32, _CTRL1>>

pub fn propseg(&self) -> PROPSEG_R

Bits 0:2 - This 3-bit field defines the length of the Propagation Segment in the bit time

pub fn lom(&self) -> LOM_R

Bit 3 - This bit configures FLEXCAN to operate in Listen Only Mode

pub fn lbuf(&self) -> LBUF_R

Bit 4 - This bit defines the ordering mechanism for Message Buffer transmission

pub fn tsyn(&self) -> TSYN_R

Bit 5 - This bit enables a mechanism that resets the free-running timer each time a message is received in Message Buffer 0

pub fn boffrec(&self) -> BOFFREC_R

Bit 6 - This bit defines how FLEXCAN recovers from Bus Off state

pub fn smp(&self) -> SMP_R

Bit 7 - This bit defines the sampling mode of CAN bits at the FLEXCAN_RX

pub fn rwrnmsk(&self) -> RWRNMSK_R

Bit 10 - This bit provides a mask for the Rx Warning Interrupt associated with the RWRN_INT flag in the Error and Status Register

pub fn twrnmsk(&self) -> TWRNMSK_R

Bit 11 - This bit provides a mask for the Tx Warning Interrupt associated with the TWRN_INT flag in the Error and Status Register

pub fn lpb(&self) -> LPB_R

Bit 12 - This bit configures FlexCAN to operate in Loop-Back Mode

pub fn errmsk(&self) -> ERRMSK_R

Bit 14 - This bit provides a mask for the Error Interrupt.

pub fn boffmsk(&self) -> BOFFMSK_R

Bit 15 - This bit provides a mask for the Bus Off Interrupt.

pub fn pseg2(&self) -> PSEG2_R

Bits 16:18 - This 3-bit field defines the length of Phase Buffer Segment 2 in the bit time

pub fn pseg1(&self) -> PSEG1_R

Bits 19:21 - This 3-bit field defines the length of Phase Buffer Segment 1 in the bit time

pub fn rjw(&self) -> RJW_R

Bits 22:23 - This 2-bit field defines the maximum number of time quanta One time quantum is equal to the Sclock period

pub fn presdiv(&self) -> PRESDIV_R

Bits 24:31 - This 8-bit field defines the ratio between the PE clock frequency and the Serial Clock (Sclock) frequency

impl R<u32, Reg<u32, _TIMER>>

pub fn timer(&self) -> TIMER_R

Bits 0:15 - TIMER

impl R<u32, MG_A>

pub fn variant(&self) -> Variant<u32, MG_A>

Get enumerated values variant

pub fn is_mg_0(&self) -> bool

Checks if the value of the field is MG_0

pub fn is_mg_1(&self) -> bool

Checks if the value of the field is MG_1

impl R<u32, Reg<u32, _RXMGMASK>>

pub fn mg(&self) -> MG_R

Bits 0:31 - These bits mask the Mailbox filter bits as shown in the figure above

impl R<u32, RX14M_A>

pub fn variant(&self) -> Variant<u32, RX14M_A>

Get enumerated values variant

pub fn is_rx14m_0(&self) -> bool

Checks if the value of the field is RX14M_0

pub fn is_rx14m_1(&self) -> bool

Checks if the value of the field is RX14M_1

impl R<u32, Reg<u32, _RX14MASK>>

pub fn rx14m(&self) -> RX14M_R

Bits 0:31 - These bits mask Mailbox 14 filter bits in the same fashion as RXMGMASK masks other Mailboxes filters (see RXMGMASKRx Mailboxes Global Mask Register )

impl R<u32, RX15M_A>

pub fn variant(&self) -> Variant<u32, RX15M_A>

Get enumerated values variant

pub fn is_rx15m_0(&self) -> bool

Checks if the value of the field is RX15M_0

pub fn is_rx15m_1(&self) -> bool

Checks if the value of the field is RX15M_1

impl R<u32, Reg<u32, _RX15MASK>>

pub fn rx15m(&self) -> RX15M_R

Bits 0:31 - These bits mask Mailbox 15 filter bits in the same fashion as RXMGMASK masks other Mailboxes filters (see RXMGMASKRx Mailboxes Global Mask Register )

impl R<u32, Reg<u32, _ECR>>

pub fn tx_err_counter(&self) -> TX_ERR_COUNTER_R

Bits 0:7 - Tx_Err_Counter

pub fn rx_err_counter(&self) -> RX_ERR_COUNTER_R

Bits 8:15 - Rx_Err_Counter

impl R<bool, WAKINT_A>

pub fn variant(&self) -> WAKINT_A

Get enumerated values variant

pub fn is_wakint_0(&self) -> bool

Checks if the value of the field is WAKINT_0

pub fn is_wakint_1(&self) -> bool

Checks if the value of the field is WAKINT_1

impl R<bool, ERRINT_A>

pub fn variant(&self) -> ERRINT_A

Get enumerated values variant

pub fn is_errint_0(&self) -> bool

Checks if the value of the field is ERRINT_0

pub fn is_errint_1(&self) -> bool

Checks if the value of the field is ERRINT_1

impl R<bool, BOFFINT_A>

pub fn variant(&self) -> BOFFINT_A

Get enumerated values variant

pub fn is_boffint_0(&self) -> bool

Checks if the value of the field is BOFFINT_0

pub fn is_boffint_1(&self) -> bool

Checks if the value of the field is BOFFINT_1

impl R<bool, RX_A>

pub fn variant(&self) -> RX_A

Get enumerated values variant

pub fn is_rx_0(&self) -> bool

Checks if the value of the field is RX_0

pub fn is_rx_1(&self) -> bool

Checks if the value of the field is RX_1

impl R<u8, FLTCONF_A>

pub fn variant(&self) -> Variant<u8, FLTCONF_A>

Get enumerated values variant

pub fn is_fltconf_0(&self) -> bool

Checks if the value of the field is FLTCONF_0

pub fn is_fltconf_1(&self) -> bool

Checks if the value of the field is FLTCONF_1

pub fn is_fltconf_2(&self) -> bool

Checks if the value of the field is FLTCONF_2

impl R<bool, TX_A>

pub fn variant(&self) -> TX_A

Get enumerated values variant

pub fn is_tx_0(&self) -> bool

Checks if the value of the field is TX_0

pub fn is_tx_1(&self) -> bool

Checks if the value of the field is TX_1

impl R<bool, IDLE_A>

pub fn variant(&self) -> IDLE_A

Get enumerated values variant

pub fn is_idle_0(&self) -> bool

Checks if the value of the field is IDLE_0

pub fn is_idle_1(&self) -> bool

Checks if the value of the field is IDLE_1

impl R<bool, RXWRN_A>

pub fn variant(&self) -> RXWRN_A

Get enumerated values variant

pub fn is_rxwrn_0(&self) -> bool

Checks if the value of the field is RXWRN_0

pub fn is_rxwrn_1(&self) -> bool

Checks if the value of the field is RXWRN_1

impl R<bool, TXWRN_A>

pub fn variant(&self) -> TXWRN_A

Get enumerated values variant

pub fn is_txwrn_0(&self) -> bool

Checks if the value of the field is TXWRN_0

pub fn is_txwrn_1(&self) -> bool

Checks if the value of the field is TXWRN_1

impl R<bool, STFERR_A>

pub fn variant(&self) -> STFERR_A

Get enumerated values variant

pub fn is_stferr_0(&self) -> bool

Checks if the value of the field is STFERR_0

pub fn is_stferr_1(&self) -> bool

Checks if the value of the field is STFERR_1

impl R<bool, FRMERR_A>

pub fn variant(&self) -> FRMERR_A

Get enumerated values variant

pub fn is_frmerr_0(&self) -> bool

Checks if the value of the field is FRMERR_0

pub fn is_frmerr_1(&self) -> bool

Checks if the value of the field is FRMERR_1

impl R<bool, CRCERR_A>

pub fn variant(&self) -> CRCERR_A

Get enumerated values variant

pub fn is_crcerr_0(&self) -> bool

Checks if the value of the field is CRCERR_0

pub fn is_crcerr_1(&self) -> bool

Checks if the value of the field is CRCERR_1

impl R<bool, ACKERR_A>

pub fn variant(&self) -> ACKERR_A

Get enumerated values variant

pub fn is_ackerr_0(&self) -> bool

Checks if the value of the field is ACKERR_0

pub fn is_ackerr_1(&self) -> bool

Checks if the value of the field is ACKERR_1

impl R<bool, BIT0ERR_A>

pub fn variant(&self) -> BIT0ERR_A

Get enumerated values variant

pub fn is_bit0err_0(&self) -> bool

Checks if the value of the field is BIT0ERR_0

pub fn is_bit0err_1(&self) -> bool

Checks if the value of the field is BIT0ERR_1

impl R<bool, BIT1ERR_A>

pub fn variant(&self) -> BIT1ERR_A

Get enumerated values variant

pub fn is_bit1err_0(&self) -> bool

Checks if the value of the field is BIT1ERR_0

pub fn is_bit1err_1(&self) -> bool

Checks if the value of the field is BIT1ERR_1

impl R<bool, RWRNINT_A>

pub fn variant(&self) -> RWRNINT_A

Get enumerated values variant

pub fn is_rwrnint_0(&self) -> bool

Checks if the value of the field is RWRNINT_0

pub fn is_rwrnint_1(&self) -> bool

Checks if the value of the field is RWRNINT_1

impl R<bool, TWRNINT_A>

pub fn variant(&self) -> TWRNINT_A

Get enumerated values variant

pub fn is_twrnint_0(&self) -> bool

Checks if the value of the field is TWRNINT_0

pub fn is_twrnint_1(&self) -> bool

Checks if the value of the field is TWRNINT_1

impl R<bool, SYNCH_A>

pub fn variant(&self) -> SYNCH_A

Get enumerated values variant

pub fn is_synch_0(&self) -> bool

Checks if the value of the field is SYNCH_0

pub fn is_synch_1(&self) -> bool

Checks if the value of the field is SYNCH_1

impl R<u32, Reg<u32, _ESR1>>

pub fn wakint(&self) -> WAKINT_R

Bit 0 - When FLEXCAN is Stop Mode and a recessive to dominant transition is detected on the CAN bus and if the WAK_MSK bit in the MCR Register is set, an interrupt is generated to the Arm

pub fn errint(&self) -> ERRINT_R

Bit 1 - This bit indicates that at least one of the Error Bits (bits 15-10) is set

pub fn boffint(&self) -> BOFFINT_R

Bit 2 - This bit is set when FLEXCAN enters 'Bus Off' state

pub fn rx(&self) -> RX_R

Bit 3 - This bit indicates if FlexCAN is receiving a message. Refer to .

pub fn fltconf(&self) -> FLTCONF_R

Bits 4:5 - If the LOM bit in the Control Register is asserted, after some delay that depends on the CAN bit timing the FLT_CONF field will indicate "Error Passive"

pub fn tx(&self) -> TX_R

Bit 6 - This bit indicates if FLEXCAN is transmitting a message.Refer to .

pub fn idle(&self) -> IDLE_R

Bit 7 - This bit indicates when CAN bus is in IDLE state.Refer to .

pub fn rxwrn(&self) -> RXWRN_R

Bit 8 - This bit indicates when repetitive errors are occurring during message reception.

pub fn txwrn(&self) -> TXWRN_R

Bit 9 - This bit indicates when repetitive errors are occurring during message transmission.

pub fn stferr(&self) -> STFERR_R

Bit 10 - This bit indicates that a Stuffing Error has been detected.

pub fn frmerr(&self) -> FRMERR_R

Bit 11 - This bit indicates that a Form Error has been detected by the receiver node, i

pub fn crcerr(&self) -> CRCERR_R

Bit 12 - This bit indicates that a CRC Error has been detected by the receiver node, i

pub fn ackerr(&self) -> ACKERR_R

Bit 13 - This bit indicates that an Acknowledge Error has been detected by the transmitter node, i

pub fn bit0err(&self) -> BIT0ERR_R

Bit 14 - This bit indicates when an inconsistency occurs between the transmitted and the received bit in a message

pub fn bit1err(&self) -> BIT1ERR_R

Bit 15 - This bit indicates when an inconsistency occurs between the transmitted and the received bit in a message

pub fn rwrnint(&self) -> RWRNINT_R

Bit 16 - If the WRN_EN bit in MCR is asserted, the RWRN_INT bit is set when the RX_WRN flag transition from '0' to '1', meaning that the Rx error counters reached 96

pub fn twrnint(&self) -> TWRNINT_R

Bit 17 - If the WRN_EN bit in MCR is asserted, the TWRN_INT bit is set when the TX_WRN flag transition from '0' to '1', meaning that the Tx error counter reached 96

pub fn synch(&self) -> SYNCH_R

Bit 18 - This read-only flag indicates whether the FlexCAN is synchronized to the CAN bus and able to participate in the communication process

impl R<u32, BUFHM_A>

pub fn variant(&self) -> Variant<u32, BUFHM_A>

Get enumerated values variant

pub fn is_bufhm_0(&self) -> bool

Checks if the value of the field is BUFHM_0

pub fn is_bufhm_1(&self) -> bool

Checks if the value of the field is BUFHM_1

impl R<u32, Reg<u32, _IMASK2>>

pub fn bufhm(&self) -> BUFHM_R

Bits 0:31 - Each bit enables or disables the respective FLEXCAN Message Buffer (MB32 to MB63) Interrupt

impl R<u32, BUFLM_A>

pub fn variant(&self) -> Variant<u32, BUFLM_A>

Get enumerated values variant

pub fn is_buflm_0(&self) -> bool

Checks if the value of the field is BUFLM_0

pub fn is_buflm_1(&self) -> bool

Checks if the value of the field is BUFLM_1

impl R<u32, Reg<u32, _IMASK1>>

pub fn buflm(&self) -> BUFLM_R

Bits 0:31 - Each bit enables or disables the respective FLEXCAN Message Buffer (MB0 to MB31) Interrupt

impl R<u32, BUFHI_A>

pub fn variant(&self) -> Variant<u32, BUFHI_A>

Get enumerated values variant

pub fn is_bufhi_0(&self) -> bool

Checks if the value of the field is BUFHI_0

pub fn is_bufhi_1(&self) -> bool

Checks if the value of the field is BUFHI_1

impl R<u32, Reg<u32, _IFLAG2>>

pub fn bufhi(&self) -> BUFHI_R

Bits 0:31 - Each bit flags the respective FLEXCAN Message Buffer (MB32 to MB63) interrupt.

impl R<u8, BUF4TO0I_A>

pub fn variant(&self) -> Variant<u8, BUF4TO0I_A>

Get enumerated values variant

pub fn is_buf4to0i_0(&self) -> bool

Checks if the value of the field is BUF4TO0I_0

pub fn is_buf4to0i_1(&self) -> bool

Checks if the value of the field is BUF4TO0I_1

impl R<bool, BUF5I_A>

pub fn variant(&self) -> BUF5I_A

Get enumerated values variant

pub fn is_buf5i_0(&self) -> bool

Checks if the value of the field is BUF5I_0

pub fn is_buf5i_1(&self) -> bool

Checks if the value of the field is BUF5I_1

impl R<bool, BUF6I_A>

pub fn variant(&self) -> BUF6I_A

Get enumerated values variant

pub fn is_buf6i_0(&self) -> bool

Checks if the value of the field is BUF6I_0

pub fn is_buf6i_1(&self) -> bool

Checks if the value of the field is BUF6I_1

impl R<bool, BUF7I_A>

pub fn variant(&self) -> BUF7I_A

Get enumerated values variant

pub fn is_buf7i_0(&self) -> bool

Checks if the value of the field is BUF7I_0

pub fn is_buf7i_1(&self) -> bool

Checks if the value of the field is BUF7I_1

impl R<u32, BUF31TO8I_A>

pub fn variant(&self) -> Variant<u32, BUF31TO8I_A>

Get enumerated values variant

pub fn is_buf31to8i_0(&self) -> bool

Checks if the value of the field is BUF31TO8I_0

pub fn is_buf31to8i_1(&self) -> bool

Checks if the value of the field is BUF31TO8I_1

impl R<u32, Reg<u32, _IFLAG1>>

pub fn buf4to0i(&self) -> BUF4TO0I_R

Bits 0:4 - If the Rx FIFO is not enabled, these bits flag the interrupts for MB0 to MB4

pub fn buf5i(&self) -> BUF5I_R

Bit 5 - If the Rx FIFO is not enabled, this bit flags the interrupt for MB5

pub fn buf6i(&self) -> BUF6I_R

Bit 6 - If the Rx FIFO is not enabled, this bit flags the interrupt for MB6

pub fn buf7i(&self) -> BUF7I_R

Bit 7 - If the Rx FIFO is not enabled, this bit flags the interrupt for MB7

pub fn buf31to8i(&self) -> BUF31TO8I_R

Bits 8:31 - Each bit flags the respective FLEXCAN Message Buffer (MB8 to MB31) interrupt.

impl R<bool, EACEN_A>

pub fn variant(&self) -> EACEN_A

Get enumerated values variant

pub fn is_eacen_0(&self) -> bool

Checks if the value of the field is EACEN_0

pub fn is_eacen_1(&self) -> bool

Checks if the value of the field is EACEN_1

impl R<bool, RRS_A>

pub fn variant(&self) -> RRS_A

Get enumerated values variant

pub fn is_rrs_0(&self) -> bool

Checks if the value of the field is RRS_0

pub fn is_rrs_1(&self) -> bool

Checks if the value of the field is RRS_1

impl R<bool, MRP_A>

pub fn variant(&self) -> MRP_A

Get enumerated values variant

pub fn is_mrp_0(&self) -> bool

Checks if the value of the field is MRP_0

pub fn is_mrp_1(&self) -> bool

Checks if the value of the field is MRP_1

impl R<bool, WRMFRZ_A>

pub fn variant(&self) -> WRMFRZ_A

Get enumerated values variant

pub fn is_wrmfrz_0(&self) -> bool

Checks if the value of the field is WRMFRZ_0

pub fn is_wrmfrz_1(&self) -> bool

Checks if the value of the field is WRMFRZ_1

impl R<u32, Reg<u32, _CTRL2>>

pub fn eacen(&self) -> EACEN_R

Bit 16 - This bit controls the comparison of IDE and RTR bits within Rx Mailboxes filters with their corresponding bits in the incoming frame by the matching process

pub fn rrs(&self) -> RRS_R

Bit 17 - If this bit is asserted Remote Request Frame is submitted to a matching process and stored in the corresponding Message Buffer in the same fashion of a Data Frame

pub fn mrp(&self) -> MRP_R

Bit 18 - If this bit is set the matching process starts from the Mailboxes and if no match occurs the matching continues on the Rx FIFO

pub fn tasd(&self) -> TASD_R

Bits 19:23 - This 5-bit field indicates how many CAN bits the Tx arbitration process start point can be delayed from the first bit of CRC field on CAN bus

pub fn rffn(&self) -> RFFN_R

Bits 24:27 - This 4-bit field defines the number of Rx FIFO filters according to

pub fn wrmfrz(&self) -> WRMFRZ_R

Bit 28 - Enable unrestricted write access to FlexCAN memory in Freeze mode

impl R<bool, IMB_A>

pub fn variant(&self) -> IMB_A

Get enumerated values variant

pub fn is_imb_0(&self) -> bool

Checks if the value of the field is IMB_0

pub fn is_imb_1(&self) -> bool

Checks if the value of the field is IMB_1

impl R<bool, VPS_A>

pub fn variant(&self) -> VPS_A

Get enumerated values variant

pub fn is_vps_0(&self) -> bool

Checks if the value of the field is VPS_0

pub fn is_vps_1(&self) -> bool

Checks if the value of the field is VPS_1

impl R<u32, Reg<u32, _ESR2>>

pub fn imb(&self) -> IMB_R

Bit 13 - If ESR2[VPS] is asserted, this bit indicates whether there is any inactive Mailbox (CODE field is either 0b1000 or 0b0000)

pub fn vps(&self) -> VPS_R

Bit 14 - This bit indicates whether IMB and LPTM contents are currently valid or not

pub fn lptm(&self) -> LPTM_R

Bits 16:22 - If ESR2[VPS] is asserted, his 7-bit field indicates the lowest number inactive Mailbox (refer to IMB bit description)

impl R<u32, Reg<u32, _CRCR>>

pub fn txcrc(&self) -> TXCRC_R

Bits 0:14 - This field indicates the CRC value of the last message transmitted

pub fn mbcrc(&self) -> MBCRC_R

Bits 16:22 - This field indicates the number of the Mailbox corresponding to the value in TXCRC field.

impl R<u32, FGM_A>

pub fn variant(&self) -> Variant<u32, FGM_A>

Get enumerated values variant

pub fn is_fgm_0(&self) -> bool

Checks if the value of the field is FGM_0

pub fn is_fgm_1(&self) -> bool

Checks if the value of the field is FGM_1

impl R<u32, Reg<u32, _RXFGMASK>>

pub fn fgm(&self) -> FGM_R

Bits 0:31 - These bits mask the ID Filter Table elements bits in a perfect alignment

impl R<u32, Reg<u32, _RXFIR>>

pub fn idhit(&self) -> IDHIT_R

Bits 0:8 - This 9-bit field indicates which Identifier Acceptance Filter (see Rx FIFO Structure) was hit by the received message that is in the output of the Rx FIFO

impl R<u32, Reg<u32, _DBG1>>

pub fn cfsm(&self) -> CFSM_R

Bits 0:5 - CAN Finite State Machine

pub fn cbn(&self) -> CBN_R

Bits 24:28 - CAN Bit Number

impl R<bool, MPP_A>

pub fn variant(&self) -> MPP_A

Get enumerated values variant

pub fn is_mpp_0(&self) -> bool

Checks if the value of the field is MPP_0

pub fn is_mpp_1(&self) -> bool

Checks if the value of the field is MPP_1

impl R<bool, APP_A>

pub fn variant(&self) -> APP_A

Get enumerated values variant

pub fn is_app_0(&self) -> bool

Checks if the value of the field is APP_0

pub fn is_app_1(&self) -> bool

Checks if the value of the field is APP_1

impl R<u32, Reg<u32, _DBG2>>

pub fn rmp(&self) -> RMP_R

Bits 0:6 - Rx Matching Pointer

pub fn mpp(&self) -> MPP_R

Bit 7 - Matching Process in Progress

pub fn tap(&self) -> TAP_R

Bits 8:14 - Tx Arbitration Pointer

pub fn app(&self) -> APP_R

Bit 15 - Arbitration Process in Progress

impl R<u32, MI_A>

pub fn variant(&self) -> Variant<u32, MI_A>

Get enumerated values variant

pub fn is_mi_0(&self) -> bool

Checks if the value of the field is MI_0

pub fn is_mi_1(&self) -> bool

Checks if the value of the field is MI_1

impl R<u32, Reg<u32, _RXIMR>>

pub fn mi(&self) -> MI_R

Bits 0:31 - These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways

impl R<u32, Reg<u32, _GFWR>>

pub fn gfwr(&self) -> GFWR_R

Bits 0:7 - It determines the Glitch Filter Width

Trait Implementations

impl<U, T, FI> PartialEq<FI> for R<U, T> where
    U: PartialEq,
    FI: Copy + Into<U>, 

fn eq(&self, other: &FI) -> bool

This method tests for self and other values to be equal, and is used by ==.

#[must_use]fn ne(&self, other: &Rhs) -> bool

This method tests for !=.