[−][src]Module imxrt1062_can1::ctrl1

Control 1 Register

Structs

BOFFMSK_W	Write proxy for field `BOFFMSK`
BOFFREC_W	Write proxy for field `BOFFREC`
ERRMSK_W	Write proxy for field `ERRMSK`
LBUF_W	Write proxy for field `LBUF`
LOM_W	Write proxy for field `LOM`
LPB_W	Write proxy for field `LPB`
PRESDIV_W	Write proxy for field `PRESDIV`
PROPSEG_W	Write proxy for field `PROPSEG`
PSEG1_W	Write proxy for field `PSEG1`
PSEG2_W	Write proxy for field `PSEG2`
RJW_W	Write proxy for field `RJW`
RWRNMSK_W	Write proxy for field `RWRNMSK`
SMP_W	Write proxy for field `SMP`
TSYN_W	Write proxy for field `TSYN`
TWRNMSK_W	Write proxy for field `TWRNMSK`

BOFFMSK_A	This bit provides a mask for the Bus Off Interrupt.
BOFFREC_A	This bit defines how FLEXCAN recovers from Bus Off state
ERRMSK_A	This bit provides a mask for the Error Interrupt.
LBUF_A	This bit defines the ordering mechanism for Message Buffer transmission
LOM_A	This bit configures FLEXCAN to operate in Listen Only Mode
LPB_A	This bit configures FlexCAN to operate in Loop-Back Mode
RWRNMSK_A	This bit provides a mask for the Rx Warning Interrupt associated with the RWRN_INT flag in the Error and Status Register
SMP_A	This bit defines the sampling mode of CAN bits at the FLEXCAN_RX
TSYN_A	This bit enables a mechanism that resets the free-running timer each time a message is received in Message Buffer 0
TWRNMSK_A	This bit provides a mask for the Tx Warning Interrupt associated with the TWRN_INT flag in the Error and Status Register