Enum TestWireIO

pub enum TestWireIO<T: Zero + Display + Copy + Debug + Send + Sync + PartialEq + Eq> {
    None,
    AddOpIO(AddOpIO),
    ConstantOpIO(ConstantOpIO<T>),
    DoubleOutOpIO(DoubleOutOpIO),
    FailingOperatorIO(FailingOperatorIO),
    IncrementOperatorIO(IncrementOperatorIO),
    Merge2OpIO(Merge2OpIO),
    MultiplyOpIO(MultiplyOpIO),
    NoOpOperatorIO(NoOpOperatorIO),
    SingleChannelPassthroughOperatorIO(SingleChannelPassthroughOperatorIO<T>),
    SingleValOpIO(SingleValOpIO),
    SplitAndDoubleOpIO(SplitAndDoubleOpIO),
    StreamyOperatorIO(StreamyOperatorIO<T>),
    SinkOperatorIO(SinkOperatorIO<T>),
}

Variants

None

AddOpIO(AddOpIO)

ConstantOpIO(ConstantOpIO<T>)

DoubleOutOpIO(DoubleOutOpIO)

FailingOperatorIO(FailingOperatorIO)

IncrementOperatorIO(IncrementOperatorIO)

Merge2OpIO(Merge2OpIO)

MultiplyOpIO(MultiplyOpIO)

NoOpOperatorIO(NoOpOperatorIO)

SingleChannelPassthroughOperatorIO(SingleChannelPassthroughOperatorIO<T>)

SingleValOpIO(SingleValOpIO)

SplitAndDoubleOpIO(SplitAndDoubleOpIO)

StreamyOperatorIO(StreamyOperatorIO<T>)

SinkOperatorIO(SinkOperatorIO<T>)

Implementations

impl<T: Zero + Display + Copy + Debug + Send + Sync + PartialEq + Eq> TestWireIO<T>

pub fn active_output_port(&self) -> Option<usize>

pub fn port_try_into_dynamic<__T>(&self) -> Result<__T, NetworkError>

where Self: PortTryInto0<__T, Error = NetworkError> + PortTryInto1<__T, Error = NetworkError> + PortTryInto2<__T, Error = NetworkError> + PortTryInto3<__T, Error = NetworkError>,

Combines active_output_port() + the correct port_try_intoN() in one shot.

Trait Implementations

impl<T: Clone + Zero + Display + Copy + Debug + Send + Sync + PartialEq + Eq> Clone for TestWireIO<T>

fn clone(&self) -> TestWireIO<T>

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl<T: Debug + Zero + Display + Copy + Debug + Send + Sync + PartialEq + Eq> Debug for TestWireIO<T>

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl<T: Zero + Display + Copy + Debug + Send + Sync + PartialEq + Eq> Default for TestWireIO<T>

fn default() -> TestWireIO<T>

Returns the “default value” for a type.

impl<T: Zero + Display + Copy + Debug + Send + Sync + PartialEq + Eq> Operator<TestWireIO<T>> for AddOp

fn opcode(&self) -> Arc<dyn OpCode>

Returns the operation code, which can be used to inform specialized handling or diagnostics.

fn input_count(&self) -> usize

How many actual inputs does this operator need?

fn output_count(&self) -> usize

How many outputs does this operator produce?

fn input_port_type_str(&self, port: usize) -> Option<&'static str>

used by the network! dag compiler to verify that the input port of one operator is compatible with the data flowing into it from the output port of another operator

fn output_port_type_str(&self, port: usize) -> Option<&'static str>

used by the network! dag compiler to verify that the output port of one operator is compatible with the data required by the input port of its downstream operator

fn input_port_connection_required(&self, port: usize) -> bool

used by the network! dag compiler to verify that this input port needs an output connection

fn output_port_connection_required(&self, port: usize) -> bool

used by the network! dag compiler to verify that this output port needs an input connection

fn execute<'life0, 'life1, 'life2, 'async_trait>( &'life0 self, input: [Option<&'life1 TestWireIO<T>>; 4], output: &'life2 mut [Option<TestWireIO<T>>; 4], ) -> Pin<Box<dyn Future<Output = NetResult<()>> + Send + 'async_trait>>

where Self: 'async_trait, 'life0: 'async_trait, 'life1: 'async_trait, 'life2: 'async_trait,

The big 4×4 method: You receive up to 4 inputs and must fill up to 4 outputs.

impl<T: Zero + Display + Copy + Debug + Send + Sync + PartialEq + Eq> Operator<TestWireIO<T>> for ConstantOp<T>

fn opcode(&self) -> Arc<dyn OpCode>

Returns the operation code, which can be used to inform specialized handling or diagnostics.

fn input_count(&self) -> usize

How many actual inputs does this operator need?

fn output_count(&self) -> usize

How many outputs does this operator produce?

fn input_port_type_str(&self, port: usize) -> Option<&'static str>

used by the network! dag compiler to verify that the input port of one operator is compatible with the data flowing into it from the output port of another operator

fn output_port_type_str(&self, port: usize) -> Option<&'static str>

used by the network! dag compiler to verify that the output port of one operator is compatible with the data required by the input port of its downstream operator

fn input_port_connection_required(&self, port: usize) -> bool

used by the network! dag compiler to verify that this input port needs an output connection

fn output_port_connection_required(&self, port: usize) -> bool

used by the network! dag compiler to verify that this output port needs an input connection

fn execute<'life0, 'life1, 'life2, 'async_trait>( &'life0 self, input: [Option<&'life1 TestWireIO<T>>; 4], output: &'life2 mut [Option<TestWireIO<T>>; 4], ) -> Pin<Box<dyn Future<Output = NetResult<()>> + Send + 'async_trait>>

where Self: 'async_trait, 'life0: 'async_trait, 'life1: 'async_trait, 'life2: 'async_trait,

The big 4×4 method: You receive up to 4 inputs and must fill up to 4 outputs.

impl<T: Zero + Display + Copy + Debug + Send + Sync + PartialEq + Eq> Operator<TestWireIO<T>> for DoubleOutOp

fn opcode(&self) -> Arc<dyn OpCode>

Returns the operation code, which can be used to inform specialized handling or diagnostics.

fn input_count(&self) -> usize

How many actual inputs does this operator need?

fn output_count(&self) -> usize

How many outputs does this operator produce?

fn input_port_type_str(&self, port: usize) -> Option<&'static str>

used by the network! dag compiler to verify that the input port of one operator is compatible with the data flowing into it from the output port of another operator

fn output_port_type_str(&self, port: usize) -> Option<&'static str>

used by the network! dag compiler to verify that the output port of one operator is compatible with the data required by the input port of its downstream operator

fn input_port_connection_required(&self, port: usize) -> bool

used by the network! dag compiler to verify that this input port needs an output connection

fn output_port_connection_required(&self, port: usize) -> bool

used by the network! dag compiler to verify that this output port needs an input connection

fn execute<'life0, 'life1, 'life2, 'async_trait>( &'life0 self, input: [Option<&'life1 TestWireIO<T>>; 4], output: &'life2 mut [Option<TestWireIO<T>>; 4], ) -> Pin<Box<dyn Future<Output = NetResult<()>> + Send + 'async_trait>>

where Self: 'async_trait, 'life0: 'async_trait, 'life1: 'async_trait, 'life2: 'async_trait,

The big 4×4 method: You receive up to 4 inputs and must fill up to 4 outputs.

impl<T: Zero + Display + Copy + Debug + Send + Sync + PartialEq + Eq> Operator<TestWireIO<T>> for FailingOperator

fn opcode(&self) -> Arc<dyn OpCode>

Returns the operation code, which can be used to inform specialized handling or diagnostics.

fn input_count(&self) -> usize

How many actual inputs does this operator need?

fn output_count(&self) -> usize

How many outputs does this operator produce?

fn input_port_type_str(&self, port: usize) -> Option<&'static str>

used by the network! dag compiler to verify that the input port of one operator is compatible with the data flowing into it from the output port of another operator

fn output_port_type_str(&self, port: usize) -> Option<&'static str>

used by the network! dag compiler to verify that the output port of one operator is compatible with the data required by the input port of its downstream operator

fn input_port_connection_required(&self, port: usize) -> bool

used by the network! dag compiler to verify that this input port needs an output connection

fn output_port_connection_required(&self, port: usize) -> bool

used by the network! dag compiler to verify that this output port needs an input connection

fn execute<'life0, 'life1, 'life2, 'async_trait>( &'life0 self, input: [Option<&'life1 TestWireIO<T>>; 4], output: &'life2 mut [Option<TestWireIO<T>>; 4], ) -> Pin<Box<dyn Future<Output = NetResult<()>> + Send + 'async_trait>>

where Self: 'async_trait, 'life0: 'async_trait, 'life1: 'async_trait, 'life2: 'async_trait,

The big 4×4 method: You receive up to 4 inputs and must fill up to 4 outputs.

impl<T: Zero + Display + Copy + Debug + Send + Sync + PartialEq + Eq> Operator<TestWireIO<T>> for IncrementOperator

fn opcode(&self) -> Arc<dyn OpCode>

Returns the operation code, which can be used to inform specialized handling or diagnostics.

fn input_count(&self) -> usize

How many actual inputs does this operator need?

fn output_count(&self) -> usize

How many outputs does this operator produce?

fn input_port_type_str(&self, port: usize) -> Option<&'static str>

used by the network! dag compiler to verify that the input port of one operator is compatible with the data flowing into it from the output port of another operator

fn output_port_type_str(&self, port: usize) -> Option<&'static str>

used by the network! dag compiler to verify that the output port of one operator is compatible with the data required by the input port of its downstream operator

fn input_port_connection_required(&self, port: usize) -> bool

used by the network! dag compiler to verify that this input port needs an output connection

fn output_port_connection_required(&self, port: usize) -> bool

used by the network! dag compiler to verify that this output port needs an input connection

fn execute<'life0, 'life1, 'life2, 'async_trait>( &'life0 self, input: [Option<&'life1 TestWireIO<T>>; 4], output: &'life2 mut [Option<TestWireIO<T>>; 4], ) -> Pin<Box<dyn Future<Output = NetResult<()>> + Send + 'async_trait>>

where Self: 'async_trait, 'life0: 'async_trait, 'life1: 'async_trait, 'life2: 'async_trait,

The big 4×4 method: You receive up to 4 inputs and must fill up to 4 outputs.

impl<T: Zero + Display + Copy + Debug + Send + Sync + PartialEq + Eq> Operator<TestWireIO<T>> for Merge2Op

fn opcode(&self) -> Arc<dyn OpCode>

Returns the operation code, which can be used to inform specialized handling or diagnostics.

fn input_count(&self) -> usize

How many actual inputs does this operator need?

fn output_count(&self) -> usize

How many outputs does this operator produce?

fn input_port_type_str(&self, port: usize) -> Option<&'static str>

used by the network! dag compiler to verify that the input port of one operator is compatible with the data flowing into it from the output port of another operator

fn output_port_type_str(&self, port: usize) -> Option<&'static str>

used by the network! dag compiler to verify that the output port of one operator is compatible with the data required by the input port of its downstream operator

fn input_port_connection_required(&self, port: usize) -> bool

used by the network! dag compiler to verify that this input port needs an output connection

fn output_port_connection_required(&self, port: usize) -> bool

used by the network! dag compiler to verify that this output port needs an input connection

fn execute<'life0, 'life1, 'life2, 'async_trait>( &'life0 self, input: [Option<&'life1 TestWireIO<T>>; 4], output: &'life2 mut [Option<TestWireIO<T>>; 4], ) -> Pin<Box<dyn Future<Output = NetResult<()>> + Send + 'async_trait>>

where Self: 'async_trait, 'life0: 'async_trait, 'life1: 'async_trait, 'life2: 'async_trait,

The big 4×4 method: You receive up to 4 inputs and must fill up to 4 outputs.

impl<T: Zero + Display + Copy + Debug + Send + Sync + PartialEq + Eq> Operator<TestWireIO<T>> for MultiplyOp

fn opcode(&self) -> Arc<dyn OpCode>

Returns the operation code, which can be used to inform specialized handling or diagnostics.

fn input_count(&self) -> usize

How many actual inputs does this operator need?

fn output_count(&self) -> usize

How many outputs does this operator produce?

fn input_port_type_str(&self, port: usize) -> Option<&'static str>

used by the network! dag compiler to verify that the input port of one operator is compatible with the data flowing into it from the output port of another operator

fn output_port_type_str(&self, port: usize) -> Option<&'static str>

used by the network! dag compiler to verify that the output port of one operator is compatible with the data required by the input port of its downstream operator

fn input_port_connection_required(&self, port: usize) -> bool

used by the network! dag compiler to verify that this input port needs an output connection

fn output_port_connection_required(&self, port: usize) -> bool

used by the network! dag compiler to verify that this output port needs an input connection

fn execute<'life0, 'life1, 'life2, 'async_trait>( &'life0 self, input: [Option<&'life1 TestWireIO<T>>; 4], output: &'life2 mut [Option<TestWireIO<T>>; 4], ) -> Pin<Box<dyn Future<Output = NetResult<()>> + Send + 'async_trait>>

where Self: 'async_trait, 'life0: 'async_trait, 'life1: 'async_trait, 'life2: 'async_trait,

The big 4×4 method: You receive up to 4 inputs and must fill up to 4 outputs.

impl<T: Zero + Display + Copy + Debug + Send + Sync + PartialEq + Eq> Operator<TestWireIO<T>> for NoOpOperator

fn opcode(&self) -> Arc<dyn OpCode>

Returns the operation code, which can be used to inform specialized handling or diagnostics.

fn input_count(&self) -> usize

How many actual inputs does this operator need?

fn output_count(&self) -> usize

How many outputs does this operator produce?

fn input_port_type_str(&self, port: usize) -> Option<&'static str>

used by the network! dag compiler to verify that the input port of one operator is compatible with the data flowing into it from the output port of another operator

fn output_port_type_str(&self, port: usize) -> Option<&'static str>

used by the network! dag compiler to verify that the output port of one operator is compatible with the data required by the input port of its downstream operator

fn input_port_connection_required(&self, port: usize) -> bool

used by the network! dag compiler to verify that this input port needs an output connection

fn output_port_connection_required(&self, port: usize) -> bool

used by the network! dag compiler to verify that this output port needs an input connection

fn execute<'life0, 'life1, 'life2, 'async_trait>( &'life0 self, input: [Option<&'life1 TestWireIO<T>>; 4], output: &'life2 mut [Option<TestWireIO<T>>; 4], ) -> Pin<Box<dyn Future<Output = NetResult<()>> + Send + 'async_trait>>

where Self: 'async_trait, 'life0: 'async_trait, 'life1: 'async_trait, 'life2: 'async_trait,

The big 4×4 method: You receive up to 4 inputs and must fill up to 4 outputs.

impl<T: Zero + Display + Copy + Debug + Send + Sync + PartialEq + Eq> Operator<TestWireIO<T>> for SingleChannelPassthroughOperator<T>

fn opcode(&self) -> Arc<dyn OpCode>

Returns the operation code, which can be used to inform specialized handling or diagnostics.

fn input_count(&self) -> usize

How many actual inputs does this operator need?

fn output_count(&self) -> usize

How many outputs does this operator produce?

fn input_port_type_str(&self, port: usize) -> Option<&'static str>

used by the network! dag compiler to verify that the input port of one operator is compatible with the data flowing into it from the output port of another operator

fn output_port_type_str(&self, port: usize) -> Option<&'static str>

used by the network! dag compiler to verify that the output port of one operator is compatible with the data required by the input port of its downstream operator

fn input_port_connection_required(&self, port: usize) -> bool

used by the network! dag compiler to verify that this input port needs an output connection

fn output_port_connection_required(&self, port: usize) -> bool

used by the network! dag compiler to verify that this output port needs an input connection

fn execute<'life0, 'life1, 'life2, 'async_trait>( &'life0 self, input: [Option<&'life1 TestWireIO<T>>; 4], output: &'life2 mut [Option<TestWireIO<T>>; 4], ) -> Pin<Box<dyn Future<Output = NetResult<()>> + Send + 'async_trait>>

where Self: 'async_trait, 'life0: 'async_trait, 'life1: 'async_trait, 'life2: 'async_trait,

The big 4×4 method: You receive up to 4 inputs and must fill up to 4 outputs.

impl<T: Zero + Display + Copy + Debug + Send + Sync + PartialEq + Eq> Operator<TestWireIO<T>> for SingleValOp

fn opcode(&self) -> Arc<dyn OpCode>

Returns the operation code, which can be used to inform specialized handling or diagnostics.

fn input_count(&self) -> usize

How many actual inputs does this operator need?

fn output_count(&self) -> usize

How many outputs does this operator produce?

fn input_port_type_str(&self, port: usize) -> Option<&'static str>

used by the network! dag compiler to verify that the input port of one operator is compatible with the data flowing into it from the output port of another operator

fn output_port_type_str(&self, port: usize) -> Option<&'static str>

used by the network! dag compiler to verify that the output port of one operator is compatible with the data required by the input port of its downstream operator

fn input_port_connection_required(&self, port: usize) -> bool

used by the network! dag compiler to verify that this input port needs an output connection

fn output_port_connection_required(&self, port: usize) -> bool

used by the network! dag compiler to verify that this output port needs an input connection

fn execute<'life0, 'life1, 'life2, 'async_trait>( &'life0 self, input: [Option<&'life1 TestWireIO<T>>; 4], output: &'life2 mut [Option<TestWireIO<T>>; 4], ) -> Pin<Box<dyn Future<Output = NetResult<()>> + Send + 'async_trait>>

where Self: 'async_trait, 'life0: 'async_trait, 'life1: 'async_trait, 'life2: 'async_trait,

The big 4×4 method: You receive up to 4 inputs and must fill up to 4 outputs.

impl<T: Zero + Display + Copy + Debug + Send + Sync + PartialEq + Eq> Operator<TestWireIO<T>> for SinkOperator<T>

fn opcode(&self) -> Arc<dyn OpCode>

Returns the operation code, which can be used to inform specialized handling or diagnostics.

fn input_count(&self) -> usize

How many actual inputs does this operator need?

fn output_count(&self) -> usize

How many outputs does this operator produce?

fn input_port_type_str(&self, port: usize) -> Option<&'static str>

used by the network! dag compiler to verify that the input port of one operator is compatible with the data flowing into it from the output port of another operator

fn output_port_type_str(&self, port: usize) -> Option<&'static str>

used by the network! dag compiler to verify that the output port of one operator is compatible with the data required by the input port of its downstream operator

fn input_port_connection_required(&self, port: usize) -> bool

used by the network! dag compiler to verify that this input port needs an output connection

fn output_port_connection_required(&self, port: usize) -> bool

used by the network! dag compiler to verify that this output port needs an input connection

fn execute<'life0, 'life1, 'life2, 'async_trait>( &'life0 self, input: [Option<&'life1 TestWireIO<T>>; 4], output: &'life2 mut [Option<TestWireIO<T>>; 4], ) -> Pin<Box<dyn Future<Output = NetResult<()>> + Send + 'async_trait>>

where Self: 'async_trait, 'life0: 'async_trait, 'life1: 'async_trait, 'life2: 'async_trait,

The big 4×4 method: You receive up to 4 inputs and must fill up to 4 outputs.

impl<T: Zero + Display + Copy + Debug + Send + Sync + PartialEq + Eq> Operator<TestWireIO<T>> for SplitAndDoubleOp

fn opcode(&self) -> Arc<dyn OpCode>

Returns the operation code, which can be used to inform specialized handling or diagnostics.

fn input_count(&self) -> usize

How many actual inputs does this operator need?

fn output_count(&self) -> usize

How many outputs does this operator produce?

fn input_port_type_str(&self, port: usize) -> Option<&'static str>

used by the network! dag compiler to verify that the input port of one operator is compatible with the data flowing into it from the output port of another operator

fn output_port_type_str(&self, port: usize) -> Option<&'static str>

used by the network! dag compiler to verify that the output port of one operator is compatible with the data required by the input port of its downstream operator

fn input_port_connection_required(&self, port: usize) -> bool

used by the network! dag compiler to verify that this input port needs an output connection

fn output_port_connection_required(&self, port: usize) -> bool

used by the network! dag compiler to verify that this output port needs an input connection

fn execute<'life0, 'life1, 'life2, 'async_trait>( &'life0 self, input: [Option<&'life1 TestWireIO<T>>; 4], output: &'life2 mut [Option<TestWireIO<T>>; 4], ) -> Pin<Box<dyn Future<Output = NetResult<()>> + Send + 'async_trait>>

where Self: 'async_trait, 'life0: 'async_trait, 'life1: 'async_trait, 'life2: 'async_trait,

The big 4×4 method: You receive up to 4 inputs and must fill up to 4 outputs.

impl<T: Zero + Display + Copy + Debug + Send + Sync + PartialEq + Eq> Operator<TestWireIO<T>> for StreamyOperator<T>

fn opcode(&self) -> Arc<dyn OpCode>

Returns the operation code, which can be used to inform specialized handling or diagnostics.

fn input_count(&self) -> usize

How many actual inputs does this operator need?

fn output_count(&self) -> usize

How many outputs does this operator produce?

fn input_port_type_str(&self, port: usize) -> Option<&'static str>

used by the network! dag compiler to verify that the input port of one operator is compatible with the data flowing into it from the output port of another operator

fn output_port_type_str(&self, port: usize) -> Option<&'static str>

used by the network! dag compiler to verify that the output port of one operator is compatible with the data required by the input port of its downstream operator

fn input_port_connection_required(&self, port: usize) -> bool

used by the network! dag compiler to verify that this input port needs an output connection

fn output_port_connection_required(&self, port: usize) -> bool

used by the network! dag compiler to verify that this output port needs an input connection

fn execute<'life0, 'life1, 'life2, 'async_trait>( &'life0 self, input: [Option<&'life1 TestWireIO<T>>; 4], output: &'life2 mut [Option<TestWireIO<T>>; 4], ) -> Pin<Box<dyn Future<Output = NetResult<()>> + Send + 'async_trait>>

where Self: 'async_trait, 'life0: 'async_trait, 'life1: 'async_trait, 'life2: 'async_trait,

The big 4×4 method: You receive up to 4 inputs and must fill up to 4 outputs.

impl<T: PartialEq + Zero + Display + Copy + Debug + Send + Sync + PartialEq + Eq> PartialEq for TestWireIO<T>

fn eq(&self, other: &TestWireIO<T>) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl<T: Zero + Display + Copy + Debug + Send + Sync + PartialEq + Eq, X> PortTryInto0<X> for TestWireIO<T>

where X: Clone,

type Error = NetworkError

fn port_try_into0(self) -> Result<X, NetworkError>

Convert self into a T, using port as needed.

impl<T: Zero + Display + Copy + Debug + Send + Sync + PartialEq + Eq, X> PortTryInto1<X> for TestWireIO<T>

where X: Clone,

type Error = NetworkError

fn port_try_into1(self) -> Result<X, NetworkError>

Convert self into a T, using port as needed.

impl<T: Zero + Display + Copy + Debug + Send + Sync + PartialEq + Eq, X> PortTryInto2<X> for TestWireIO<T>

where X: Clone,

type Error = NetworkError

fn port_try_into2(self) -> Result<X, NetworkError>

Convert self into a T, using port as needed.

impl<T: Zero + Display + Copy + Debug + Send + Sync + PartialEq + Eq, X> PortTryInto3<X> for TestWireIO<T>

where X: Clone,

type Error = NetworkError

fn port_try_into3(self) -> Result<X, NetworkError>

Convert self into a T, using port as needed.

impl<T: Eq + Zero + Display + Copy + Debug + Send + Sync + PartialEq + Eq> Eq for TestWireIO<T>

impl<T: Zero + Display + Copy + Debug + Send + Sync + PartialEq + Eq> StructuralPartialEq for TestWireIO<T>