README
Overview
The hydro2-network crate defines the core data structures and utility functions for building operator‐based networks in the hydro2 ecosystem. A network is a directed acyclic graph (DAG) composed of:
- Nodes (each wrapping an operator and its I/O buffers)
- Edges (defining how data flows between node outputs and inputs)
This crate includes:
NetworkNodeandNetworkstructs to store the topology.NetworkEdgestructs for explicit connections.- Macros (
node!,edge!,network!) that simplify constructing nodes, edges, and entire networks. wire_up_network: Allocates and connects channel buffers between node outputs/inputs, ensuring each node’s input type matches the corresponding output type.- Validation (
Network::validate) for cycle detection, ensuring the network is acyclic.
Key Features
-
Operator Agnosticism
Each node references a genericOperator<NetworkItem>, enabling you to integrate any operator that implements theOperatortrait. -
Wiring & Allocation
Thewire_up_networkfunction dynamically allocates shared arcs (Arc<AsyncRwLock<...>>) for node outputs. Edges link those arcs to the downstream node’s inputs. This automatic wiring eliminates the need for manual buffer handling. -
Cycle Detection
The built‐invalidateroutine checks for DAG correctness. If a cycle is found (or other configuration errors), it returns aNetworkError. -
Macros
edge!(src_idx:src_port -> dst_idx:dst_port): Clean syntax for buildingNetworkEdge.node!(idx => op): Instantiates aNetworkNodefor a given operator.network!(nodes_vec, edges_vec): Validates and wires everything in one shot.
Usage Example
Below is a minimal example of creating and validating a single‐node network with no edges:
use ;
use NoOpOperator;
-
Adding Edges
If you have multiple nodes, define edges withedge!(0:0 -> 1:0)to connect node 0’s output‐port 0 to node 1’s input‐port 0. The macros check that ports are below4. -
Execution
Once validated and wired, your runtime or scheduler can lock each node’s inputs and outputs and invokenode.execute(). This triggers the operator’s async logic, reading from inputs and writing to outputs.
License
Distributed under the OGPv1 License (see ogp-license-text crate for more details).
Repository
Hosted on GitHub:
https://github.com/klebs6/klebs-general