pub struct L3Domain {
pub size_bytes: u64,
pub mask: AffinityMask,
pub core_count: u16,
}Expand description
A set of cores sharing one L3 cache instance.
On chiplet AMD parts a domain is a CCD (a 5950X has two 32 MiB domains on one socket), on hybrid Intel the E-core clusters form their own domains, and on X3D-style parts ONE domain carries the big cache. Cross-domain core-to-core latency is significantly higher than within a domain, so this is the granularity at which games should place cooperating threads.
Domains are content-keyed during detection (by the lowest member LP of the cache’s shared set) - never attributed per socket and never deduplicated by size, both of which silently collapse multi-CCD parts into one domain.
Fields§
§size_bytes: u64Size of this L3 instance in bytes.
mask: AffinityMaskThe LPs (OS ids) sharing this L3 instance.
core_count: u16Physical cores in this domain (SMT siblings counted once).