Crate et_kernel 

Shared no_std helpers for ET-SoC-1 compute kernels: hart identity, the U-mode trace write, a hardware memory fence, and scratchpad addressing.

This is the device-side support library for the compute kernels in this package. Each kernel binary provides its own panic handler and invokes kernel_entry! to generate the _start entry point.

Target gating

All items that contain RISC-V inline assembly are gated on #[cfg(target_arch = "riscv64")]: kernel_entry!, hart_id, shire_id, timestamp, fence, trace_str, Grid, and the tensor, pmu, and cache modules. The library compiles as a stub on any host target (useful for rust-analyzer and IDE tooling); MsgBuf, device_slice, scp_shire_base, and et_abi::CACHE_LINE remain available on all targets.

Modules

cache

L1 cache management for software-coherent cross-hart sharing.

pmu

Performance Monitoring Unit (PMU) counter API.

simd

Packed-single (PS) SIMD intrinsics for 256-bit FP registers.

tensor

Tensor-extension intrinsics, all encoded as RISC-V csrrw writes (PRM Ch. 9).

Macros

kernel_entry

Generate the kernel entry point (_start).

Structs

Grid

A hart’s view of an SPMD launch: its identity within n_harts participants.

MsgBuf

A fixed-capacity stack buffer for composing trace messages without alloc.

Constants

CACHE_LINE

Cache-line size in bytes. Per-hart outputs are placed one-per-line so that distinct harts never write the same line: false sharing silently corrupts data on this software-coherent architecture. Defined once in et-abi and shared with the host, so the two sides cannot disagree on the stride. ET-SoC-1 cache-line size, in bytes.

CB_BASE

Base of the per-hart U-mode trace control-block array (CM_UMODE_TRACE_CB_BASEADDR); each entry is 64 bytes.

Functions

device_slice^⚠

View n elements of type T at device address addr as a shared slice.

fence

Full hardware memory fence (fence rw, rw) that also bars compiler reordering. This is an ordering barrier, not an atomic operation.

hart_id

Current hart ID, from the custom hartid CSR (0xCD0).

scp_shire_base

Base address of shire’s 2.5 MB L2 scratchpad (ETSOC_SCP_GET_SHIRE_ADDR(shire, 0)): 0x8000_0000 | (shire << 23).

shire_id

Current shire ID (hart_id >> 6; 64 harts per shire).

timestamp

A cycle timestamp (hpmcounter3, CSR 0xC03) for trace entry headers.

trace_str

Write text as a NUL-terminated string trace entry for the current hart, exactly as the SDK’s Trace_String does (reserve via the control block, then write a trace_string_t).