pub struct R(_);
Expand description
Register CTRL
reader
Implementations
sourceimpl R
impl R
sourcepub fn saradc_start_force(&self) -> SARADC_START_FORCE_R
pub fn saradc_start_force(&self) -> SARADC_START_FORCE_R
Bit 0 - enable start saradc by sw
sourcepub fn saradc_start(&self) -> SARADC_START_R
pub fn saradc_start(&self) -> SARADC_START_R
Bit 1 - start saradc by sw
sourcepub fn saradc_work_mode(&self) -> SARADC_WORK_MODE_R
pub fn saradc_work_mode(&self) -> SARADC_WORK_MODE_R
Bits 3:4 - 0: single mode, 1: double mode, 2: alternate mode
sourcepub fn saradc_sar_sel(&self) -> SARADC_SAR_SEL_R
pub fn saradc_sar_sel(&self) -> SARADC_SAR_SEL_R
Bit 5 - 0: SAR1, 1: SAR2, only work for single SAR mode
sourcepub fn saradc_sar_clk_gated(&self) -> SARADC_SAR_CLK_GATED_R
pub fn saradc_sar_clk_gated(&self) -> SARADC_SAR_CLK_GATED_R
Bit 6 - enable SAR CLK gate when saradc idle
sourcepub fn saradc_sar_clk_div(&self) -> SARADC_SAR_CLK_DIV_R
pub fn saradc_sar_clk_div(&self) -> SARADC_SAR_CLK_DIV_R
Bits 7:14 - SAR clock divider
sourcepub fn saradc_sar1_patt_len(&self) -> SARADC_SAR1_PATT_LEN_R
pub fn saradc_sar1_patt_len(&self) -> SARADC_SAR1_PATT_LEN_R
Bits 15:18 - 0 ~ 15 means length 1 ~ 16
sourcepub fn saradc_sar2_patt_len(&self) -> SARADC_SAR2_PATT_LEN_R
pub fn saradc_sar2_patt_len(&self) -> SARADC_SAR2_PATT_LEN_R
Bits 19:22 - 0 ~ 15 means length 1 ~ 16
sourcepub fn saradc_sar1_patt_p_clear(&self) -> SARADC_SAR1_PATT_P_CLEAR_R
pub fn saradc_sar1_patt_p_clear(&self) -> SARADC_SAR1_PATT_P_CLEAR_R
Bit 23 - clear the pointer of pattern table for DIG ADC1 CTRL
sourcepub fn saradc_sar2_patt_p_clear(&self) -> SARADC_SAR2_PATT_P_CLEAR_R
pub fn saradc_sar2_patt_p_clear(&self) -> SARADC_SAR2_PATT_P_CLEAR_R
Bit 24 - clear the pointer of pattern table for DIG ADC2 CTRL
sourcepub fn saradc_data_sar_sel(&self) -> SARADC_DATA_SAR_SEL_R
pub fn saradc_data_sar_sel(&self) -> SARADC_DATA_SAR_SEL_R
Bit 25 - 1: sar_sel will be coded by the MSB of the 16-bit output data, in this case the resolution should not be larger than 11 bits.
sourcepub fn saradc_data_to_i2s(&self) -> SARADC_DATA_TO_I2S_R
pub fn saradc_data_to_i2s(&self) -> SARADC_DATA_TO_I2S_R
Bit 26 - 1: I2S input data is from SAR ADC (for DMA), 0: I2S input data is from GPIO matrix
sourcepub fn saradc_xpd_sar_force(&self) -> SARADC_XPD_SAR_FORCE_R
pub fn saradc_xpd_sar_force(&self) -> SARADC_XPD_SAR_FORCE_R
Bits 27:28 - force option to xpd sar blocks
sourcepub fn saradc_wait_arb_cycle(&self) -> SARADC_WAIT_ARB_CYCLE_R
pub fn saradc_wait_arb_cycle(&self) -> SARADC_WAIT_ARB_CYCLE_R
Bits 30:31 - wait arbit signal stable after sar_done