esp32s3

Struct EXTMEM

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pub struct EXTMEM { /* private fields */ }
Expand description

External Memory

Implementations§

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impl EXTMEM

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pub const PTR: *const RegisterBlock = {0x600c4000 as *const extmem::RegisterBlock}

Pointer to the register block

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pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

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pub unsafe fn steal() -> Self

Steal an instance of this peripheral

§Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>§

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pub fn dcache_ctrl(&self) -> &DCACHE_CTRL

0x00 - ******* Description ***********

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pub fn dcache_ctrl1(&self) -> &DCACHE_CTRL1

0x04 - ******* Description ***********

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pub fn dcache_tag_power_ctrl(&self) -> &DCACHE_TAG_POWER_CTRL

0x08 - ******* Description ***********

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pub fn dcache_prelock_ctrl(&self) -> &DCACHE_PRELOCK_CTRL

0x0c - ******* Description ***********

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pub fn dcache_prelock_sct0_addr(&self) -> &DCACHE_PRELOCK_SCT0_ADDR

0x10 - ******* Description ***********

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pub fn dcache_prelock_sct1_addr(&self) -> &DCACHE_PRELOCK_SCT1_ADDR

0x14 - ******* Description ***********

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pub fn dcache_prelock_sct_size(&self) -> &DCACHE_PRELOCK_SCT_SIZE

0x18 - ******* Description ***********

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pub fn dcache_lock_ctrl(&self) -> &DCACHE_LOCK_CTRL

0x1c - ******* Description ***********

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pub fn dcache_lock_addr(&self) -> &DCACHE_LOCK_ADDR

0x20 - ******* Description ***********

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pub fn dcache_lock_size(&self) -> &DCACHE_LOCK_SIZE

0x24 - ******* Description ***********

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pub fn dcache_sync_ctrl(&self) -> &DCACHE_SYNC_CTRL

0x28 - ******* Description ***********

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pub fn dcache_sync_addr(&self) -> &DCACHE_SYNC_ADDR

0x2c - ******* Description ***********

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pub fn dcache_sync_size(&self) -> &DCACHE_SYNC_SIZE

0x30 - ******* Description ***********

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pub fn dcache_occupy_ctrl(&self) -> &DCACHE_OCCUPY_CTRL

0x34 - ******* Description ***********

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pub fn dcache_occupy_addr(&self) -> &DCACHE_OCCUPY_ADDR

0x38 - ******* Description ***********

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pub fn dcache_occupy_size(&self) -> &DCACHE_OCCUPY_SIZE

0x3c - ******* Description ***********

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pub fn dcache_preload_ctrl(&self) -> &DCACHE_PRELOAD_CTRL

0x40 - ******* Description ***********

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pub fn dcache_preload_addr(&self) -> &DCACHE_PRELOAD_ADDR

0x44 - ******* Description ***********

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pub fn dcache_preload_size(&self) -> &DCACHE_PRELOAD_SIZE

0x48 - ******* Description ***********

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pub fn dcache_autoload_ctrl(&self) -> &DCACHE_AUTOLOAD_CTRL

0x4c - ******* Description ***********

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pub fn dcache_autoload_sct0_addr(&self) -> &DCACHE_AUTOLOAD_SCT0_ADDR

0x50 - ******* Description ***********

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pub fn dcache_autoload_sct0_size(&self) -> &DCACHE_AUTOLOAD_SCT0_SIZE

0x54 - ******* Description ***********

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pub fn dcache_autoload_sct1_addr(&self) -> &DCACHE_AUTOLOAD_SCT1_ADDR

0x58 - ******* Description ***********

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pub fn dcache_autoload_sct1_size(&self) -> &DCACHE_AUTOLOAD_SCT1_SIZE

0x5c - ******* Description ***********

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pub fn icache_ctrl(&self) -> &ICACHE_CTRL

0x60 - ******* Description ***********

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pub fn icache_ctrl1(&self) -> &ICACHE_CTRL1

0x64 - ******* Description ***********

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pub fn icache_tag_power_ctrl(&self) -> &ICACHE_TAG_POWER_CTRL

0x68 - ******* Description ***********

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pub fn icache_prelock_ctrl(&self) -> &ICACHE_PRELOCK_CTRL

0x6c - ******* Description ***********

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pub fn icache_prelock_sct0_addr(&self) -> &ICACHE_PRELOCK_SCT0_ADDR

0x70 - ******* Description ***********

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pub fn icache_prelock_sct1_addr(&self) -> &ICACHE_PRELOCK_SCT1_ADDR

0x74 - ******* Description ***********

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pub fn icache_prelock_sct_size(&self) -> &ICACHE_PRELOCK_SCT_SIZE

0x78 - ******* Description ***********

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pub fn icache_lock_ctrl(&self) -> &ICACHE_LOCK_CTRL

0x7c - ******* Description ***********

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pub fn icache_lock_addr(&self) -> &ICACHE_LOCK_ADDR

0x80 - ******* Description ***********

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pub fn icache_lock_size(&self) -> &ICACHE_LOCK_SIZE

0x84 - ******* Description ***********

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pub fn icache_sync_ctrl(&self) -> &ICACHE_SYNC_CTRL

0x88 - ******* Description ***********

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pub fn icache_sync_addr(&self) -> &ICACHE_SYNC_ADDR

0x8c - ******* Description ***********

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pub fn icache_sync_size(&self) -> &ICACHE_SYNC_SIZE

0x90 - ******* Description ***********

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pub fn icache_preload_ctrl(&self) -> &ICACHE_PRELOAD_CTRL

0x94 - ******* Description ***********

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pub fn icache_preload_addr(&self) -> &ICACHE_PRELOAD_ADDR

0x98 - ******* Description ***********

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pub fn icache_preload_size(&self) -> &ICACHE_PRELOAD_SIZE

0x9c - ******* Description ***********

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pub fn icache_autoload_ctrl(&self) -> &ICACHE_AUTOLOAD_CTRL

0xa0 - ******* Description ***********

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pub fn icache_autoload_sct0_addr(&self) -> &ICACHE_AUTOLOAD_SCT0_ADDR

0xa4 - ******* Description ***********

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pub fn icache_autoload_sct0_size(&self) -> &ICACHE_AUTOLOAD_SCT0_SIZE

0xa8 - ******* Description ***********

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pub fn icache_autoload_sct1_addr(&self) -> &ICACHE_AUTOLOAD_SCT1_ADDR

0xac - ******* Description ***********

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pub fn icache_autoload_sct1_size(&self) -> &ICACHE_AUTOLOAD_SCT1_SIZE

0xb0 - ******* Description ***********

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pub fn ibus_to_flash_start_vaddr(&self) -> &IBUS_TO_FLASH_START_VADDR

0xb4 - ******* Description ***********

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pub fn ibus_to_flash_end_vaddr(&self) -> &IBUS_TO_FLASH_END_VADDR

0xb8 - ******* Description ***********

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pub fn dbus_to_flash_start_vaddr(&self) -> &DBUS_TO_FLASH_START_VADDR

0xbc - ******* Description ***********

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pub fn dbus_to_flash_end_vaddr(&self) -> &DBUS_TO_FLASH_END_VADDR

0xc0 - ******* Description ***********

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pub fn cache_acs_cnt_clr(&self) -> &CACHE_ACS_CNT_CLR

0xc4 - ******* Description ***********

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pub fn ibus_acs_miss_cnt(&self) -> &IBUS_ACS_MISS_CNT

0xc8 - ******* Description ***********

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pub fn ibus_acs_cnt(&self) -> &IBUS_ACS_CNT

0xcc - ******* Description ***********

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pub fn dbus_acs_flash_miss_cnt(&self) -> &DBUS_ACS_FLASH_MISS_CNT

0xd0 - ******* Description ***********

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pub fn dbus_acs_spiram_miss_cnt(&self) -> &DBUS_ACS_SPIRAM_MISS_CNT

0xd4 - ******* Description ***********

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pub fn dbus_acs_cnt(&self) -> &DBUS_ACS_CNT

0xd8 - ******* Description ***********

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pub fn cache_ilg_int_ena(&self) -> &CACHE_ILG_INT_ENA

0xdc - ******* Description ***********

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pub fn cache_ilg_int_clr(&self) -> &CACHE_ILG_INT_CLR

0xe0 - ******* Description ***********

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pub fn cache_ilg_int_st(&self) -> &CACHE_ILG_INT_ST

0xe4 - ******* Description ***********

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pub fn core0_acs_cache_int_ena(&self) -> &CORE0_ACS_CACHE_INT_ENA

0xe8 - ******* Description ***********

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pub fn core0_acs_cache_int_clr(&self) -> &CORE0_ACS_CACHE_INT_CLR

0xec - ******* Description ***********

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pub fn core0_acs_cache_int_st(&self) -> &CORE0_ACS_CACHE_INT_ST

0xf0 - ******* Description ***********

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pub fn core1_acs_cache_int_ena(&self) -> &CORE1_ACS_CACHE_INT_ENA

0xf4 - ******* Description ***********

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pub fn core1_acs_cache_int_clr(&self) -> &CORE1_ACS_CACHE_INT_CLR

0xf8 - ******* Description ***********

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pub fn core1_acs_cache_int_st(&self) -> &CORE1_ACS_CACHE_INT_ST

0xfc - ******* Description ***********

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pub fn core0_dbus_reject_st(&self) -> &CORE0_DBUS_REJECT_ST

0x100 - ******* Description ***********

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pub fn core0_dbus_reject_vaddr(&self) -> &CORE0_DBUS_REJECT_VADDR

0x104 - ******* Description ***********

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pub fn core0_ibus_reject_st(&self) -> &CORE0_IBUS_REJECT_ST

0x108 - ******* Description ***********

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pub fn core0_ibus_reject_vaddr(&self) -> &CORE0_IBUS_REJECT_VADDR

0x10c - ******* Description ***********

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pub fn core1_dbus_reject_st(&self) -> &CORE1_DBUS_REJECT_ST

0x110 - ******* Description ***********

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pub fn core1_dbus_reject_vaddr(&self) -> &CORE1_DBUS_REJECT_VADDR

0x114 - ******* Description ***********

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pub fn core1_ibus_reject_st(&self) -> &CORE1_IBUS_REJECT_ST

0x118 - ******* Description ***********

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pub fn core1_ibus_reject_vaddr(&self) -> &CORE1_IBUS_REJECT_VADDR

0x11c - ******* Description ***********

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pub fn cache_mmu_fault_content(&self) -> &CACHE_MMU_FAULT_CONTENT

0x120 - ******* Description ***********

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pub fn cache_mmu_fault_vaddr(&self) -> &CACHE_MMU_FAULT_VADDR

0x124 - ******* Description ***********

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pub fn cache_wrap_around_ctrl(&self) -> &CACHE_WRAP_AROUND_CTRL

0x128 - ******* Description ***********

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pub fn cache_mmu_power_ctrl(&self) -> &CACHE_MMU_POWER_CTRL

0x12c - ******* Description ***********

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pub fn cache_state(&self) -> &CACHE_STATE

0x130 - ******* Description ***********

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pub fn cache_encrypt_decrypt_record_disable( &self, ) -> &CACHE_ENCRYPT_DECRYPT_RECORD_DISABLE

0x134 - ******* Description ***********

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pub fn cache_encrypt_decrypt_clk_force_on( &self, ) -> &CACHE_ENCRYPT_DECRYPT_CLK_FORCE_ON

0x138 - ******* Description ***********

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pub fn cache_bridge_arbiter_ctrl(&self) -> &CACHE_BRIDGE_ARBITER_CTRL

0x13c - ******* Description ***********

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pub fn cache_preload_int_ctrl(&self) -> &CACHE_PRELOAD_INT_CTRL

0x140 - ******* Description ***********

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pub fn cache_sync_int_ctrl(&self) -> &CACHE_SYNC_INT_CTRL

0x144 - ******* Description ***********

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pub fn cache_mmu_owner(&self) -> &CACHE_MMU_OWNER

0x148 - ******* Description ***********

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pub fn cache_conf_misc(&self) -> &CACHE_CONF_MISC

0x14c - ******* Description ***********

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pub fn dcache_freeze(&self) -> &DCACHE_FREEZE

0x150 - ******* Description ***********

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pub fn icache_freeze(&self) -> &ICACHE_FREEZE

0x154 - ******* Description ***********

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pub fn icache_atomic_operate_ena(&self) -> &ICACHE_ATOMIC_OPERATE_ENA

0x158 - ******* Description ***********

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pub fn dcache_atomic_operate_ena(&self) -> &DCACHE_ATOMIC_OPERATE_ENA

0x15c - ******* Description ***********

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pub fn cache_request(&self) -> &CACHE_REQUEST

0x160 - ******* Description ***********

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pub fn clock_gate(&self) -> &CLOCK_GATE

0x164 - ******* Description ***********

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pub fn cache_tag_object_ctrl(&self) -> &CACHE_TAG_OBJECT_CTRL

0x180 - ******* Description ***********

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pub fn cache_tag_way_object(&self) -> &CACHE_TAG_WAY_OBJECT

0x184 - ******* Description ***********

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pub fn cache_vaddr(&self) -> &CACHE_VADDR

0x188 - ******* Description ***********

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pub fn cache_tag_content(&self) -> &CACHE_TAG_CONTENT

0x18c - ******* Description ***********

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pub fn date(&self) -> &DATE

0x3fc - ******* Description ***********

Trait Implementations§

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impl Debug for EXTMEM

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fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter. Read more
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impl Deref for EXTMEM

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type Target = RegisterBlock

The resulting type after dereferencing.
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fn deref(&self) -> &Self::Target

Dereferences the value.
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impl Send for EXTMEM

Auto Trait Implementations§

Blanket Implementations§

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impl<T> Any for T
where T: 'static + ?Sized,

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fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
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impl<T> Borrow<T> for T
where T: ?Sized,

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fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
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impl<T> BorrowMut<T> for T
where T: ?Sized,

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fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
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impl<T> From<T> for T

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fn from(t: T) -> T

Returns the argument unchanged.

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impl<T, U> Into<U> for T
where U: From<T>,

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fn into(self) -> U

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

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impl<P, T> Receiver for P
where P: Deref<Target = T> + ?Sized, T: ?Sized,

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type Target = T

🔬This is a nightly-only experimental API. (arbitrary_self_types)
The target type on which the method may be called.
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impl<T, U> TryFrom<U> for T
where U: Into<T>,

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type Error = Infallible

The type returned in the event of a conversion error.
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fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
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impl<T, U> TryInto<U> for T
where U: TryFrom<T>,

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type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.
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fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.