Struct DMA

pub struct DMA { /* private fields */ }

DMA (Direct Memory Access) Controller

Implementations

impl DMA

pub const PTR: *const RegisterBlock = {0x6003f000 as *const dma::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

pub unsafe fn steal() -> Self

Steal an instance of this peripheral

Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>

pub fn ch(&self, n: usize) -> &CH

0x00..0x3c0 - Cluster CH%s, containing IN_CONF0_CH?, IN_CONF1_CH?, IN_INT_RAW_CH?, IN_INT_ST_CH?, IN_INT_ENA_CH?, IN_INT_CLR_CH?, INFIFO_STATUS_CH?, IN_POP_CH?, IN_LINK_CH?, IN_STATE_CH?, IN_SUC_EOF_DES_ADDR_CH?, IN_ERR_EOF_DES_ADDR_CH?, IN_DSCR_CH?, IN_DSCR_BF0_CH?, IN_DSCR_BF1_CH?, IN_WIGHT_CH?, IN_PRI_CH?, IN_PERI_SEL_CH?, OUT_CONF0_CH?, OUT_CONF1_CH?, OUT_INT_RAW_CH?, OUT_INT_ST_CH?, OUT_INT_ENA_CH?, OUT_INT_CLR_CH?, OUTFIFO_STATUS_CH?, OUT_PUSH_CH?, OUT_LINK_CH?, OUT_STATE_CH?, OUT_EOF_DES_ADDR_CH?, OUT_EOF_BFR_DES_ADDR_CH?, OUT_DSCR_CH?, OUT_DSCR_BF0_CH?, OUT_DSCR_BF1_CH?, OUT_WIGHT_CH?, OUT_PRI_CH?, OUT_PERI_SEL_CH?

pub fn ch_iter(&self) -> impl Iterator<Item = &CH>

Iterator for array of: 0x00..0x3c0 - Cluster CH%s, containing IN_CONF0_CH?, IN_CONF1_CH?, IN_INT_RAW_CH?, IN_INT_ST_CH?, IN_INT_ENA_CH?, IN_INT_CLR_CH?, INFIFO_STATUS_CH?, IN_POP_CH?, IN_LINK_CH?, IN_STATE_CH?, IN_SUC_EOF_DES_ADDR_CH?, IN_ERR_EOF_DES_ADDR_CH?, IN_DSCR_CH?, IN_DSCR_BF0_CH?, IN_DSCR_BF1_CH?, IN_WIGHT_CH?, IN_PRI_CH?, IN_PERI_SEL_CH?, OUT_CONF0_CH?, OUT_CONF1_CH?, OUT_INT_RAW_CH?, OUT_INT_ST_CH?, OUT_INT_ENA_CH?, OUT_INT_CLR_CH?, OUTFIFO_STATUS_CH?, OUT_PUSH_CH?, OUT_LINK_CH?, OUT_STATE_CH?, OUT_EOF_DES_ADDR_CH?, OUT_EOF_BFR_DES_ADDR_CH?, OUT_DSCR_CH?, OUT_DSCR_BF0_CH?, OUT_DSCR_BF1_CH?, OUT_WIGHT_CH?, OUT_PRI_CH?, OUT_PERI_SEL_CH?

pub fn ahb_test(&self) -> &AHB_TEST

0x3c0 - reserved

pub fn pd_conf(&self) -> &PD_CONF

0x3c4 - reserved

pub fn misc_conf(&self) -> &MISC_CONF

0x3c8 - MISC register

pub fn in_sram_size_ch(&self, n: usize) -> &IN_SRAM_SIZE_CH

0x3cc..0x3e0 - Receive L2 FIFO depth of Rx channel 0

pub fn in_sram_size_ch_iter(&self) -> impl Iterator<Item = &IN_SRAM_SIZE_CH>

Iterator for array of: 0x3cc..0x3e0 - Receive L2 FIFO depth of Rx channel 0

pub fn out_sram_size_ch(&self, n: usize) -> &OUT_SRAM_SIZE_CH

0x3d0..0x3e4 - Transmit L2 FIFO depth of Tx channel 0

pub fn out_sram_size_ch_iter(&self) -> impl Iterator<Item = &OUT_SRAM_SIZE_CH>

Iterator for array of: 0x3d0..0x3e4 - Transmit L2 FIFO depth of Tx channel 0

pub fn extmem_reject_addr(&self) -> &EXTMEM_REJECT_ADDR

0x3f4 - Reject address accessing external RAM

pub fn extmem_reject_st(&self) -> &EXTMEM_REJECT_ST

0x3f8 - Reject status accessing external RAM

pub fn extmem_reject_int_raw(&self) -> &EXTMEM_REJECT_INT_RAW

0x3fc - Raw interrupt status of external RAM permission

pub fn extmem_reject_int_st(&self) -> &EXTMEM_REJECT_INT_ST

0x400 - Masked interrupt status of external RAM permission

pub fn extmem_reject_int_ena(&self) -> &EXTMEM_REJECT_INT_ENA

0x404 - Interrupt enable bits of external RAM permission

pub fn extmem_reject_int_clr(&self) -> &EXTMEM_REJECT_INT_CLR

0x408 - Interrupt clear bits of external RAM permission

pub fn date(&self) -> &DATE

0x40c - Version control register

Trait Implementations

impl Debug for DMA

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Deref for DMA

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl Send for DMA