Type Alias esp32s3::extmem::icache_ctrl::W

pub type W = W<ICACHE_CTRL_SPEC>;

Register ICACHE_CTRL writer

Aliased Type

struct W { /* private fields */ }

Implementations

impl W

pub fn icache_enable(&mut self) -> ICACHE_ENABLE_W<'_, ICACHE_CTRL_SPEC>

Bit 0 - The bit is used to activate the data cache. 0: disable, 1: enable

pub fn icache_way_mode(&mut self) -> ICACHE_WAY_MODE_W<'_, ICACHE_CTRL_SPEC>

Bit 1 - The bit is used to configure cache way mode.0: 4-way, 1: 8-way

pub fn icache_size_mode(&mut self) -> ICACHE_SIZE_MODE_W<'_, ICACHE_CTRL_SPEC>

Bit 2 - The bit is used to configure cache memory size.0: 16KB, 1: 32KB

pub fn icache_blocksize_mode( &mut self ) -> ICACHE_BLOCKSIZE_MODE_W<'_, ICACHE_CTRL_SPEC>

Bit 3 - The bit is used to configure cache block size.0: 16 bytes, 1: 32 bytes