Expand description
External Memory
Modules§
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Structs§
- Register block
Type Aliases§
- CACHE_ACS_CNT_CLR (w) register accessor: ******* Description ***********
- CACHE_BRIDGE_ARBITER_CTRL (rw) register accessor: ******* Description ***********
- CACHE_CONF_MISC (rw) register accessor: ******* Description ***********
- CACHE_ENCRYPT_DECRYPT_CLK_FORCE_ON (rw) register accessor: ******* Description ***********
- CACHE_ENCRYPT_DECRYPT_RECORD_DISABLE (rw) register accessor: ******* Description ***********
- CACHE_ILG_INT_CLR (w) register accessor: ******* Description ***********
- CACHE_ILG_INT_ENA (rw) register accessor: ******* Description ***********
- CACHE_ILG_INT_ST (r) register accessor: ******* Description ***********
- CACHE_MMU_FAULT_CONTENT (r) register accessor: ******* Description ***********
- CACHE_MMU_FAULT_VADDR (r) register accessor: ******* Description ***********
- CACHE_MMU_OWNER (rw) register accessor: ******* Description ***********
- CACHE_MMU_POWER_CTRL (rw) register accessor: ******* Description ***********
- CACHE_PRELOAD_INT_CTRL (rw) register accessor: ******* Description ***********
- CACHE_REQUEST (rw) register accessor: ******* Description ***********
- CACHE_STATE (r) register accessor: ******* Description ***********
- CACHE_SYNC_INT_CTRL (rw) register accessor: ******* Description ***********
- CACHE_TAG_CONTENT (rw) register accessor: ******* Description ***********
- CACHE_TAG_OBJECT_CTRL (rw) register accessor: ******* Description ***********
- CACHE_TAG_WAY_OBJECT (rw) register accessor: ******* Description ***********
- CACHE_VADDR (rw) register accessor: ******* Description ***********
- CACHE_WRAP_AROUND_CTRL (rw) register accessor: ******* Description ***********
- CLOCK_GATE (rw) register accessor: ******* Description ***********
- CORE0_ACS_CACHE_INT_CLR (w) register accessor: ******* Description ***********
- CORE0_ACS_CACHE_INT_ENA (rw) register accessor: ******* Description ***********
- CORE0_ACS_CACHE_INT_ST (r) register accessor: ******* Description ***********
- CORE0_DBUS_REJECT_ST (r) register accessor: ******* Description ***********
- CORE0_DBUS_REJECT_VADDR (r) register accessor: ******* Description ***********
- CORE0_IBUS_REJECT_ST (r) register accessor: ******* Description ***********
- CORE0_IBUS_REJECT_VADDR (r) register accessor: ******* Description ***********
- CORE1_ACS_CACHE_INT_CLR (w) register accessor: ******* Description ***********
- CORE1_ACS_CACHE_INT_ENA (rw) register accessor: ******* Description ***********
- CORE1_ACS_CACHE_INT_ST (r) register accessor: ******* Description ***********
- CORE1_DBUS_REJECT_ST (r) register accessor: ******* Description ***********
- CORE1_DBUS_REJECT_VADDR (r) register accessor: ******* Description ***********
- CORE1_IBUS_REJECT_ST (r) register accessor: ******* Description ***********
- CORE1_IBUS_REJECT_VADDR (r) register accessor: ******* Description ***********
- DATE (rw) register accessor: ******* Description ***********
- DBUS_ACS_CNT (r) register accessor: ******* Description ***********
- DBUS_ACS_FLASH_MISS_CNT (r) register accessor: ******* Description ***********
- DBUS_ACS_SPIRAM_MISS_CNT (r) register accessor: ******* Description ***********
- DBUS_TO_FLASH_END_VADDR (rw) register accessor: ******* Description ***********
- DBUS_TO_FLASH_START_VADDR (rw) register accessor: ******* Description ***********
- DCACHE_ATOMIC_OPERATE_ENA (rw) register accessor: ******* Description ***********
- DCACHE_AUTOLOAD_CTRL (rw) register accessor: ******* Description ***********
- DCACHE_AUTOLOAD_SCT0_ADDR (rw) register accessor: ******* Description ***********
- DCACHE_AUTOLOAD_SCT0_SIZE (rw) register accessor: ******* Description ***********
- DCACHE_AUTOLOAD_SCT1_ADDR (rw) register accessor: ******* Description ***********
- DCACHE_AUTOLOAD_SCT1_SIZE (rw) register accessor: ******* Description ***********
- DCACHE_CTRL (rw) register accessor: ******* Description ***********
- DCACHE_CTRL1 (rw) register accessor: ******* Description ***********
- DCACHE_FREEZE (rw) register accessor: ******* Description ***********
- DCACHE_LOCK_ADDR (rw) register accessor: ******* Description ***********
- DCACHE_LOCK_CTRL (rw) register accessor: ******* Description ***********
- DCACHE_LOCK_SIZE (rw) register accessor: ******* Description ***********
- DCACHE_OCCUPY_ADDR (rw) register accessor: ******* Description ***********
- DCACHE_OCCUPY_CTRL (rw) register accessor: ******* Description ***********
- DCACHE_OCCUPY_SIZE (rw) register accessor: ******* Description ***********
- DCACHE_PRELOAD_ADDR (rw) register accessor: ******* Description ***********
- DCACHE_PRELOAD_CTRL (rw) register accessor: ******* Description ***********
- DCACHE_PRELOAD_SIZE (rw) register accessor: ******* Description ***********
- DCACHE_PRELOCK_CTRL (rw) register accessor: ******* Description ***********
- DCACHE_PRELOCK_SCT0_ADDR (rw) register accessor: ******* Description ***********
- DCACHE_PRELOCK_SCT1_ADDR (rw) register accessor: ******* Description ***********
- DCACHE_PRELOCK_SCT_SIZE (rw) register accessor: ******* Description ***********
- DCACHE_SYNC_ADDR (rw) register accessor: ******* Description ***********
- DCACHE_SYNC_CTRL (rw) register accessor: ******* Description ***********
- DCACHE_SYNC_SIZE (rw) register accessor: ******* Description ***********
- DCACHE_TAG_POWER_CTRL (rw) register accessor: ******* Description ***********
- IBUS_ACS_CNT (r) register accessor: ******* Description ***********
- IBUS_ACS_MISS_CNT (r) register accessor: ******* Description ***********
- IBUS_TO_FLASH_END_VADDR (rw) register accessor: ******* Description ***********
- IBUS_TO_FLASH_START_VADDR (rw) register accessor: ******* Description ***********
- ICACHE_ATOMIC_OPERATE_ENA (rw) register accessor: ******* Description ***********
- ICACHE_AUTOLOAD_CTRL (rw) register accessor: ******* Description ***********
- ICACHE_AUTOLOAD_SCT0_ADDR (rw) register accessor: ******* Description ***********
- ICACHE_AUTOLOAD_SCT0_SIZE (rw) register accessor: ******* Description ***********
- ICACHE_AUTOLOAD_SCT1_ADDR (rw) register accessor: ******* Description ***********
- ICACHE_AUTOLOAD_SCT1_SIZE (rw) register accessor: ******* Description ***********
- ICACHE_CTRL (rw) register accessor: ******* Description ***********
- ICACHE_CTRL1 (rw) register accessor: ******* Description ***********
- ICACHE_FREEZE (rw) register accessor: ******* Description ***********
- ICACHE_LOCK_ADDR (rw) register accessor: ******* Description ***********
- ICACHE_LOCK_CTRL (rw) register accessor: ******* Description ***********
- ICACHE_LOCK_SIZE (rw) register accessor: ******* Description ***********
- ICACHE_PRELOAD_ADDR (rw) register accessor: ******* Description ***********
- ICACHE_PRELOAD_CTRL (rw) register accessor: ******* Description ***********
- ICACHE_PRELOAD_SIZE (rw) register accessor: ******* Description ***********
- ICACHE_PRELOCK_CTRL (rw) register accessor: ******* Description ***********
- ICACHE_PRELOCK_SCT0_ADDR (rw) register accessor: ******* Description ***********
- ICACHE_PRELOCK_SCT1_ADDR (rw) register accessor: ******* Description ***********
- ICACHE_PRELOCK_SCT_SIZE (rw) register accessor: ******* Description ***********
- ICACHE_SYNC_ADDR (rw) register accessor: ******* Description ***********
- ICACHE_SYNC_CTRL (rw) register accessor: ******* Description ***********
- ICACHE_SYNC_SIZE (rw) register accessor: ******* Description ***********
- ICACHE_TAG_POWER_CTRL (rw) register accessor: ******* Description ***********