Module esp32s3::rmt::int_st

Masked interrupt status

Structs

• INT_ST_SPEC
  Masked interrupt status
• R
  Register INT_ST reader

Type Definitions

• CH4_RX_THR_EVENT_INT_ST_R
  Field CH4_RX_THR_EVENT_INT_ST reader - The masked interrupt status bit for CH4_RX_THR_EVENT_INT.
• CH5_RX_THR_EVENT_INT_ST_R
  Field CH5_RX_THR_EVENT_INT_ST reader - The masked interrupt status bit for CH5_RX_THR_EVENT_INT.
• CH6_RX_THR_EVENT_INT_ST_R
  Field CH6_RX_THR_EVENT_INT_ST reader - The masked interrupt status bit for CH6_RX_THR_EVENT_INT.
• CH7_RX_THR_EVENT_INT_ST_R
  Field CH7_RX_THR_EVENT_INT_ST reader - The masked interrupt status bit for CH7_RX_THR_EVENT_INT.
• CH_RX_END_INT_ST_R
  Field CH_RX_END_INT_ST[4-7] reader - The masked interrupt status bit for CH4_RX_END_INT.
• CH_RX_ERR_INT_ST_R
  Field CH_RX_ERR_INT_ST[4-7] reader - The masked interrupt status bit for CH4_ERR_INT.
• CH_TX_END_INT_ST_R
  Field CH_TX_END_INT_ST[0-3] reader - The masked interrupt status bit for CH%s_TX_END_INT.
• CH_TX_ERR_INT_ST_R
  Field CH_TX_ERR_INT_ST[0-3] reader - The masked interrupt status bit for CH%s_ERR_INT.
• CH_TX_LOOP_INT_ST_R
  Field CH_TX_LOOP_INT_ST[0-3] reader - The masked interrupt status bit for CH%s_TX_LOOP_INT.
• CH_TX_THR_EVENT_INT_ST_R
  Field CH_TX_THR_EVENT_INT_ST[0-3] reader - The masked interrupt status bit for CH%s_TX_THR_EVENT_INT.
• RX_CH7_DMA_ACCESS_FAIL_INT_ST_R
  Field RX_CH7_DMA_ACCESS_FAIL_INT_ST reader - The masked interrupt status bit for CH7_DMA_ACCESS_FAIL_INT.
• TX_CH3_DMA_ACCESS_FAIL_INT_ST_R
  Field TX_CH3_DMA_ACCESS_FAIL_INT_ST reader - The masked interrupt status bit for CH3_DMA_ACCESS_FAIL_INT.