Module esp32s3_hal::pac::lcd_cam::cam_ctrl1

Camera configuration register

Structs

CAM_CTRL1_SPEC

Camera configuration register

R

Register CAM_CTRL1 reader

W

Register CAM_CTRL1 writer

Type Definitions

CAM_2BYTE_EN_R

Field CAM_2BYTE_EN reader - 1: The bit number of input data is 9~16. 0: The bit number of input data is 0~8.

CAM_2BYTE_EN_W

Field CAM_2BYTE_EN writer - 1: The bit number of input data is 9~16. 0: The bit number of input data is 0~8.

CAM_AFIFO_RESET_W

Field CAM_AFIFO_RESET writer - Camera AFIFO reset signal.

CAM_CLK_INV_R

Field CAM_CLK_INV reader - 1: Invert the input signal CAM_PCLK. 0: Not invert.

CAM_CLK_INV_W

Field CAM_CLK_INV writer - 1: Invert the input signal CAM_PCLK. 0: Not invert.

CAM_DE_INV_R

Field CAM_DE_INV reader - CAM_DE invert enable signal, valid in high level.

CAM_DE_INV_W

Field CAM_DE_INV writer - CAM_DE invert enable signal, valid in high level.

CAM_HSYNC_INV_R

Field CAM_HSYNC_INV reader - CAM_HSYNC invert enable signal, valid in high level.

CAM_HSYNC_INV_W

Field CAM_HSYNC_INV writer - CAM_HSYNC invert enable signal, valid in high level.

CAM_LINE_INT_NUM_R

Field CAM_LINE_INT_NUM reader - The line number minus 1 to generate cam_hs_int.

CAM_LINE_INT_NUM_W

Field CAM_LINE_INT_NUM writer - The line number minus 1 to generate cam_hs_int.

CAM_REC_DATA_BYTELEN_R

Field CAM_REC_DATA_BYTELEN reader - Camera receive data byte length minus 1 to set DMA in_suc_eof_int.

CAM_REC_DATA_BYTELEN_W

Field CAM_REC_DATA_BYTELEN writer - Camera receive data byte length minus 1 to set DMA in_suc_eof_int.

CAM_RESET_W

Field CAM_RESET writer - Camera module reset signal.

CAM_START_R

Field CAM_START reader - Camera module start signal.

CAM_START_W

Field CAM_START writer - Camera module start signal.

CAM_VH_DE_MODE_EN_R

Field CAM_VH_DE_MODE_EN reader - 1: Input control signals are CAM_DE CAM_HSYNC and CAM_VSYNC is 1. 0: Input control signals are CAM_DE and CAM_VSYNC. CAM_HSYNC and CAM_DE are all 1 the the same time.

CAM_VH_DE_MODE_EN_W

Field CAM_VH_DE_MODE_EN writer - 1: Input control signals are CAM_DE CAM_HSYNC and CAM_VSYNC is 1. 0: Input control signals are CAM_DE and CAM_VSYNC. CAM_HSYNC and CAM_DE are all 1 the the same time.

CAM_VSYNC_FILTER_EN_R

Field CAM_VSYNC_FILTER_EN reader - 1: Enable CAM_VSYNC filter function. 0: bypass.

CAM_VSYNC_FILTER_EN_W

Field CAM_VSYNC_FILTER_EN writer - 1: Enable CAM_VSYNC filter function. 0: bypass.

CAM_VSYNC_INV_R

Field CAM_VSYNC_INV reader - CAM_VSYNC invert enable signal, valid in high level.

CAM_VSYNC_INV_W

Field CAM_VSYNC_INV writer - CAM_VSYNC invert enable signal, valid in high level.