Module esp32c6::spi1::spi_mem_ctrl1

SPI1 control1 register.

Structs

• R
  Register SPI_MEM_CTRL1 reader
• SPI_MEM_CTRL1_SPEC
  SPI1 control1 register.
• W
  Register SPI_MEM_CTRL1 writer

Type Definitions

• SPI_MEM_CLK_MODE_R
  Field SPI_MEM_CLK_MODE reader - SPI clock mode bits. 0: SPI clock is off when CS inactive 1: SPI clock is delayed one cycle after CS inactive 2: SPI clock is delayed two cycles after CS inactive 3: SPI clock is alwasy on.
• SPI_MEM_CLK_MODE_W
  Field SPI_MEM_CLK_MODE writer - SPI clock mode bits. 0: SPI clock is off when CS inactive 1: SPI clock is delayed one cycle after CS inactive 2: SPI clock is delayed two cycles after CS inactive 3: SPI clock is alwasy on.
• SPI_MEM_CS_HOLD_DLY_RES_R
  Field SPI_MEM_CS_HOLD_DLY_RES reader - After RES/DP/HPM command is sent, SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 512) SPI_CLK cycles.
• SPI_MEM_CS_HOLD_DLY_RES_W
  Field SPI_MEM_CS_HOLD_DLY_RES writer - After RES/DP/HPM command is sent, SPI1 waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 512) SPI_CLK cycles.