Struct esp32c6::timg0::wdtconfig0::R

pub struct R(_);

Register WDTCONFIG0 reader

Implementations

impl R

pub fn wdt_appcpu_reset_en(&self) -> WDT_APPCPU_RESET_EN_R

Bit 12 - WDT reset CPU enable.

pub fn wdt_procpu_reset_en(&self) -> WDT_PROCPU_RESET_EN_R

Bit 13 - WDT reset CPU enable.

pub fn wdt_flashboot_mod_en(&self) -> WDT_FLASHBOOT_MOD_EN_R

Bit 14 - When set, Flash boot protection is enabled.

pub fn wdt_sys_reset_length(&self) -> WDT_SYS_RESET_LENGTH_R

Bits 15:17 - System reset signal length selection. 0: 100 ns, 1: 200 ns, 2: 300 ns, 3: 400 ns, 4: 500 ns, 5: 800 ns, 6: 1.6 us, 7: 3.2 us.

pub fn wdt_cpu_reset_length(&self) -> WDT_CPU_RESET_LENGTH_R

Bits 18:20 - CPU reset signal length selection. 0: 100 ns, 1: 200 ns, 2: 300 ns, 3: 400 ns, 4: 500 ns, 5: 800 ns, 6: 1.6 us, 7: 3.2 us.

pub fn wdt_use_xtal(&self) -> WDT_USE_XTAL_R

Bit 21 - choose WDT clock:0-apb_clk, 1-xtal_clk.

pub fn wdt_stg3(&self) -> WDT_STG3_R

Bits 23:24 - Stage 3 configuration. 0: off, 1: interrupt, 2: reset CPU, 3: reset system.

pub fn wdt_stg2(&self) -> WDT_STG2_R

Bits 25:26 - Stage 2 configuration. 0: off, 1: interrupt, 2: reset CPU, 3: reset system.

pub fn wdt_stg1(&self) -> WDT_STG1_R

Bits 27:28 - Stage 1 configuration. 0: off, 1: interrupt, 2: reset CPU, 3: reset system.

pub fn wdt_stg0(&self) -> WDT_STG0_R

Bits 29:30 - Stage 0 configuration. 0: off, 1: interrupt, 2: reset CPU, 3: reset system.

pub fn wdt_en(&self) -> WDT_EN_R

Bit 31 - When set, MWDT is enabled.

Methods from Deref<Target = R<WDTCONFIG0_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<WDTCONFIG0_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<WDTCONFIG0_SPEC>> for R

fn from(reader: R<WDTCONFIG0_SPEC>) -> Self

Converts to this type from the input type.