Module esp32c6::mcpwm0::cap_timer_cfg

source ·
Expand description

Configure capture timer

Structs§

Type Aliases§

  • Field CAP_SYNCI_EN reader - When set, capture timer sync is enabled.
  • Field CAP_SYNCI_EN writer - When set, capture timer sync is enabled.
  • Field CAP_SYNCI_SEL reader - capture module sync input selection. 0: none, 1: timer0 sync_out, 2: timer1 sync_out, 3: timer2 sync_out, 4: SYNC0 from GPIO matrix, 5: SYNC1 from GPIO matrix, 6: SYNC2 from GPIO matrix
  • Field CAP_SYNCI_SEL writer - capture module sync input selection. 0: none, 1: timer0 sync_out, 2: timer1 sync_out, 3: timer2 sync_out, 4: SYNC0 from GPIO matrix, 5: SYNC1 from GPIO matrix, 6: SYNC2 from GPIO matrix
  • Field CAP_SYNC_SW writer - When reg_cap_synci_en is 1, write 1 will trigger a capture timer sync, capture timer is loaded with value in phase register.
  • Field CAP_TIMER_EN reader - When set, capture timer incrementing under APB_clk is enabled.
  • Field CAP_TIMER_EN writer - When set, capture timer incrementing under APB_clk is enabled.
  • Register CAP_TIMER_CFG reader
  • Register CAP_TIMER_CFG writer