pub struct USB_DEVICE { /* private fields */ }
Implementations§
Source§impl USB_DEVICE
impl USB_DEVICE
Sourcepub const PTR: *const <USB_DEVICE as Deref>::Target = {0x6000f000 as *const <esp32c6::USB_DEVICE as core::ops::Deref>::Target}
pub const PTR: *const <USB_DEVICE as Deref>::Target = {0x6000f000 as *const <esp32c6::USB_DEVICE as core::ops::Deref>::Target}
Pointer to the register block
Sourcepub unsafe fn steal() -> USB_DEVICE
pub unsafe fn steal() -> USB_DEVICE
Unsafely create an instance of this peripheral out of thin air.
§Safety
You must ensure that you’re only using one instance of this type at a time.
Methods from Deref<Target = RegisterBlock>§
Sourcepub fn ep1(&self) -> &Reg<EP1_SPEC>
pub fn ep1(&self) -> &Reg<EP1_SPEC>
0x00 - FIFO access for the CDC-ACM data IN and OUT endpoints.
Sourcepub fn ep1_conf(&self) -> &Reg<EP1_CONF_SPEC>
pub fn ep1_conf(&self) -> &Reg<EP1_CONF_SPEC>
0x04 - Configuration and control registers for the CDC-ACM FIFOs.
Sourcepub fn int_raw(&self) -> &Reg<INT_RAW_SPEC>
pub fn int_raw(&self) -> &Reg<INT_RAW_SPEC>
0x08 - Interrupt raw status register.
Sourcepub fn int_st(&self) -> &Reg<INT_ST_SPEC>
pub fn int_st(&self) -> &Reg<INT_ST_SPEC>
0x0c - Interrupt status register.
Sourcepub fn int_ena(&self) -> &Reg<INT_ENA_SPEC>
pub fn int_ena(&self) -> &Reg<INT_ENA_SPEC>
0x10 - Interrupt enable status register.
Sourcepub fn int_clr(&self) -> &Reg<INT_CLR_SPEC>
pub fn int_clr(&self) -> &Reg<INT_CLR_SPEC>
0x14 - Interrupt clear status register.
Sourcepub fn conf0(&self) -> &Reg<CONF0_SPEC>
pub fn conf0(&self) -> &Reg<CONF0_SPEC>
0x18 - PHY hardware configuration.
Sourcepub fn jfifo_st(&self) -> &Reg<JFIFO_ST_SPEC>
pub fn jfifo_st(&self) -> &Reg<JFIFO_ST_SPEC>
0x20 - JTAG FIFO status and control registers.
Sourcepub fn fram_num(&self) -> &Reg<FRAM_NUM_SPEC>
pub fn fram_num(&self) -> &Reg<FRAM_NUM_SPEC>
0x24 - Last received SOF frame index register.
Sourcepub fn in_ep0_st(&self) -> &Reg<IN_EP0_ST_SPEC>
pub fn in_ep0_st(&self) -> &Reg<IN_EP0_ST_SPEC>
0x28 - Control IN endpoint status information.
Sourcepub fn in_ep1_st(&self) -> &Reg<IN_EP1_ST_SPEC>
pub fn in_ep1_st(&self) -> &Reg<IN_EP1_ST_SPEC>
0x2c - CDC-ACM IN endpoint status information.
Sourcepub fn in_ep2_st(&self) -> &Reg<IN_EP2_ST_SPEC>
pub fn in_ep2_st(&self) -> &Reg<IN_EP2_ST_SPEC>
0x30 - CDC-ACM interrupt IN endpoint status information.
Sourcepub fn in_ep3_st(&self) -> &Reg<IN_EP3_ST_SPEC>
pub fn in_ep3_st(&self) -> &Reg<IN_EP3_ST_SPEC>
0x34 - JTAG IN endpoint status information.
Sourcepub fn out_ep0_st(&self) -> &Reg<OUT_EP0_ST_SPEC>
pub fn out_ep0_st(&self) -> &Reg<OUT_EP0_ST_SPEC>
0x38 - Control OUT endpoint status information.
Sourcepub fn out_ep1_st(&self) -> &Reg<OUT_EP1_ST_SPEC>
pub fn out_ep1_st(&self) -> &Reg<OUT_EP1_ST_SPEC>
0x3c - CDC-ACM OUT endpoint status information.
Sourcepub fn out_ep2_st(&self) -> &Reg<OUT_EP2_ST_SPEC>
pub fn out_ep2_st(&self) -> &Reg<OUT_EP2_ST_SPEC>
0x40 - JTAG OUT endpoint status information.
Sourcepub fn misc_conf(&self) -> &Reg<MISC_CONF_SPEC>
pub fn misc_conf(&self) -> &Reg<MISC_CONF_SPEC>
0x44 - Clock enable control
Sourcepub fn mem_conf(&self) -> &Reg<MEM_CONF_SPEC>
pub fn mem_conf(&self) -> &Reg<MEM_CONF_SPEC>
0x48 - Memory power control
Sourcepub fn chip_rst(&self) -> &Reg<CHIP_RST_SPEC>
pub fn chip_rst(&self) -> &Reg<CHIP_RST_SPEC>
0x4c - CDC-ACM chip reset control.
Sourcepub fn set_line_code_w0(&self) -> &Reg<SET_LINE_CODE_W0_SPEC>
pub fn set_line_code_w0(&self) -> &Reg<SET_LINE_CODE_W0_SPEC>
0x50 - W0 of SET_LINE_CODING command.
Sourcepub fn set_line_code_w1(&self) -> &Reg<SET_LINE_CODE_W1_SPEC>
pub fn set_line_code_w1(&self) -> &Reg<SET_LINE_CODE_W1_SPEC>
0x54 - W1 of SET_LINE_CODING command.
Sourcepub fn get_line_code_w0(&self) -> &Reg<GET_LINE_CODE_W0_SPEC>
pub fn get_line_code_w0(&self) -> &Reg<GET_LINE_CODE_W0_SPEC>
0x58 - W0 of GET_LINE_CODING command.
Sourcepub fn get_line_code_w1(&self) -> &Reg<GET_LINE_CODE_W1_SPEC>
pub fn get_line_code_w1(&self) -> &Reg<GET_LINE_CODE_W1_SPEC>
0x5c - W1 of GET_LINE_CODING command.
Sourcepub fn config_update(&self) -> &Reg<CONFIG_UPDATE_SPEC>
pub fn config_update(&self) -> &Reg<CONFIG_UPDATE_SPEC>
0x60 - Configuration registers’ value update
Sourcepub fn ser_afifo_config(&self) -> &Reg<SER_AFIFO_CONFIG_SPEC>
pub fn ser_afifo_config(&self) -> &Reg<SER_AFIFO_CONFIG_SPEC>
0x64 - Serial AFIFO configure register
Sourcepub fn bus_reset_st(&self) -> &Reg<BUS_RESET_ST_SPEC>
pub fn bus_reset_st(&self) -> &Reg<BUS_RESET_ST_SPEC>
0x68 - USB Bus reset status register