Struct esp32c2_hal::pac::uart0::mem_conf::R
pub struct R(_);
Expand description
Register MEM_CONF
reader
Implementations§
§impl R
impl R
pub fn rx_size(&self) -> FieldReaderRaw<u8, u8>
pub fn rx_size(&self) -> FieldReaderRaw<u8, u8>
Bits 1:3 - This register is used to configure the amount of mem allocated for receive-FIFO. The default number is 128 bytes.
pub fn tx_size(&self) -> FieldReaderRaw<u8, u8>
pub fn tx_size(&self) -> FieldReaderRaw<u8, u8>
Bits 4:6 - This register is used to configure the amount of mem allocated for transmit-FIFO. The default number is 128 bytes.
pub fn rx_flow_thrhd(&self) -> FieldReaderRaw<u16, u16>
pub fn rx_flow_thrhd(&self) -> FieldReaderRaw<u16, u16>
Bits 7:15 - This register is used to configure the maximum amount of data that can be received when hardware flow control works.
pub fn rx_tout_thrhd(&self) -> FieldReaderRaw<u16, u16>
pub fn rx_tout_thrhd(&self) -> FieldReaderRaw<u16, u16>
Bits 16:25 - This register is used to configure the threshold time that receiver takes to receive one byte. The rxfifo_tout_int interrupt will be trigger when the receiver takes more time to receive one byte with rx_tout_en set to 1.
pub fn mem_force_pd(&self) -> BitReaderRaw<bool>
pub fn mem_force_pd(&self) -> BitReaderRaw<bool>
Bit 26 - Set this bit to force power down UART memory.
pub fn mem_force_pu(&self) -> BitReaderRaw<bool>
pub fn mem_force_pu(&self) -> BitReaderRaw<bool>
Bit 27 - Set this bit to force power up UART memory.
Methods from Deref<Target = R<MEM_CONF_SPEC>>§
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
Reads raw bits from register.