Struct esp32c2_hal::pac::spi2::slave::R
pub struct R(_);
Expand description
Register SLAVE
reader
Implementations§
§impl R
impl R
pub fn clk_mode(&self) -> FieldReaderRaw<u8, u8>
pub fn clk_mode(&self) -> FieldReaderRaw<u8, u8>
Bits 0:1 - SPI clock mode bits. 0: SPI clock is off when CS inactive 1: SPI clock is delayed one cycle after CS inactive 2: SPI clock is delayed two cycles after CS inactive 3: SPI clock is alwasy on. Can be configured in CONF state.
pub fn clk_mode_13(&self) -> BitReaderRaw<bool>
pub fn clk_mode_13(&self) -> BitReaderRaw<bool>
Bit 2 - {CPOL, CPHA},1: support spi clk mode 1 and 3, first edge output data B[0]/B[7]. 0: support spi clk mode 0 and 2, first edge output data B[1]/B[6].
pub fn rsck_data_out(&self) -> BitReaderRaw<bool>
pub fn rsck_data_out(&self) -> BitReaderRaw<bool>
Bit 3 - It saves half a cycle when tsck is the same as rsck. 1: output data at rsck posedge 0: output data at tsck posedge
pub fn slv_rddma_bitlen_en(&self) -> BitReaderRaw<bool>
pub fn slv_rddma_bitlen_en(&self) -> BitReaderRaw<bool>
Bit 8 - 1: SPI_SLV_DATA_BITLEN stores data bit length of master-read-slave data length in DMA controlled mode(Rd_DMA). 0: others
pub fn slv_wrdma_bitlen_en(&self) -> BitReaderRaw<bool>
pub fn slv_wrdma_bitlen_en(&self) -> BitReaderRaw<bool>
Bit 9 - 1: SPI_SLV_DATA_BITLEN stores data bit length of master-write-to-slave data length in DMA controlled mode(Wr_DMA). 0: others
pub fn slv_rdbuf_bitlen_en(&self) -> BitReaderRaw<bool>
pub fn slv_rdbuf_bitlen_en(&self) -> BitReaderRaw<bool>
Bit 10 - 1: SPI_SLV_DATA_BITLEN stores data bit length of master-read-slave data length in CPU controlled mode(Rd_BUF). 0: others
pub fn slv_wrbuf_bitlen_en(&self) -> BitReaderRaw<bool>
pub fn slv_wrbuf_bitlen_en(&self) -> BitReaderRaw<bool>
Bit 11 - 1: SPI_SLV_DATA_BITLEN stores data bit length of master-write-to-slave data length in CPU controlled mode(Wr_BUF). 0: others
pub fn dma_seg_magic_value(&self) -> FieldReaderRaw<u8, u8>
pub fn dma_seg_magic_value(&self) -> FieldReaderRaw<u8, u8>
Bits 22:25 - The magic value of BM table in master DMA seg-trans.
Methods from Deref<Target = R<SLAVE_SPEC>>§
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
Reads raw bits from register.