Struct esp32c2_hal::pac::spi2::dma_conf::R

pub struct R(_);

Register DMA_CONF reader

Implementations

impl R

pub fn dma_outfifo_empty(&self) -> BitReaderRaw<bool>

Bit 0 - Records the status of DMA TX FIFO. 1: DMA TX FIFO is not ready for sending data. 0: DMA TX FIFO is ready for sending data.

pub fn dma_infifo_full(&self) -> BitReaderRaw<bool>

Bit 1 - Records the status of DMA RX FIFO. 1: DMA RX FIFO is not ready for receiving data. 0: DMA RX FIFO is ready for receiving data.

pub fn dma_slv_seg_trans_en(&self) -> BitReaderRaw<bool>

Bit 18 - Enable dma segment transfer in spi dma half slave mode. 1: enable. 0: disable.

pub fn slv_rx_seg_trans_clr_en(&self) -> BitReaderRaw<bool>

Bit 19 - 1: spi_dma_infifo_full_vld is cleared by spi slave cmd 5. 0: spi_dma_infifo_full_vld is cleared by spi_trans_done.

pub fn slv_tx_seg_trans_clr_en(&self) -> BitReaderRaw<bool>

Bit 20 - 1: spi_dma_outfifo_empty_vld is cleared by spi slave cmd 6. 0: spi_dma_outfifo_empty_vld is cleared by spi_trans_done.

pub fn rx_eof_en(&self) -> BitReaderRaw<bool>

Bit 21 - 1: spi_dma_inlink_eof is set when the number of dma pushed data bytes is equal to the value of spi_slv/mst_dma_rd_bytelen[19:0] in spi dma transition. 0: spi_dma_inlink_eof is set by spi_trans_done in non-seg-trans or spi_dma_seg_trans_done in seg-trans.

pub fn dma_rx_ena(&self) -> BitReaderRaw<bool>

Bit 27 - Set this bit to enable SPI DMA controlled receive data mode.

pub fn dma_tx_ena(&self) -> BitReaderRaw<bool>

Bit 28 - Set this bit to enable SPI DMA controlled send data mode.

Methods from Deref<Target = R<DMA_CONF_SPEC>>

pub fn bits(&self) -> <REG as RegisterSpec>::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<DMA_CONF_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<R as Deref>::Target

Dereferences the value.

impl From<R<DMA_CONF_SPEC>> for R

fn from(reader: R<DMA_CONF_SPEC>) -> R

Converts to this type from the input type.