Struct esp32c2_hal::pac::spi2::clock::R
pub struct R(_);
Expand description
Register CLOCK
reader
Implementations§
§impl R
impl R
pub fn clkcnt_l(&self) -> FieldReaderRaw<u8, u8>
pub fn clkcnt_l(&self) -> FieldReaderRaw<u8, u8>
Bits 0:5 - In the master mode it must be equal to spi_clkcnt_N. In the slave mode it must be 0. Can be configured in CONF state.
pub fn clkcnt_h(&self) -> FieldReaderRaw<u8, u8>
pub fn clkcnt_h(&self) -> FieldReaderRaw<u8, u8>
Bits 6:11 - In the master mode it must be floor((spi_clkcnt_N+1)/2-1). In the slave mode it must be 0. Can be configured in CONF state.
pub fn clkcnt_n(&self) -> FieldReaderRaw<u8, u8>
pub fn clkcnt_n(&self) -> FieldReaderRaw<u8, u8>
Bits 12:17 - In the master mode it is the divider of spi_clk. So spi_clk frequency is system/(spi_clkdiv_pre+1)/(spi_clkcnt_N+1). Can be configured in CONF state.
pub fn clkdiv_pre(&self) -> FieldReaderRaw<u8, u8>
pub fn clkdiv_pre(&self) -> FieldReaderRaw<u8, u8>
Bits 18:21 - In the master mode it is pre-divider of spi_clk. Can be configured in CONF state.
pub fn clk_equ_sysclk(&self) -> BitReaderRaw<bool>
pub fn clk_equ_sysclk(&self) -> BitReaderRaw<bool>
Bit 31 - In the master mode 1: spi_clk is eqaul to system 0: spi_clk is divided from system clock. Can be configured in CONF state.
Methods from Deref<Target = R<CLOCK_SPEC>>§
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
Reads raw bits from register.
Trait Implementations§
§impl From<R<CLOCK_SPEC>> for R
impl From<R<CLOCK_SPEC>> for R
§fn from(reader: R<CLOCK_SPEC>) -> R
fn from(reader: R<CLOCK_SPEC>) -> R
Converts to this type from the input type.