Struct esp32c2_hal::pac::spi0::fsm::R
pub struct R(_);
Expand description
Register FSM
reader
Implementations§
§impl R
impl R
pub fn cspi_st(&self) -> FieldReaderRaw<u8, u8>
pub fn cspi_st(&self) -> FieldReaderRaw<u8, u8>
Bits 0:3 - The current status of SPI0 slave FSM: spi0_slv_st. 0: idle state, 1: preparation state, 2: send command state, 3: send address state, 4: wait state, 5: read data state, 6:write data state, 7: done state, 8: read data end state.
pub fn em_st(&self) -> FieldReaderRaw<u8, u8>
pub fn em_st(&self) -> FieldReaderRaw<u8, u8>
Bits 4:6 - The current status of SPI0 master FSM: spi0_mst_st. 0: idle state, 1:EM_CACHE_GRANT , 2: program/erase suspend state, 3: SPI0 read data state, 4: wait cache/EDMA sent data is stored in SPI0 TX FIFO, 5: SPI0 write data state.
pub fn cspi_lock_delay_time(&self) -> FieldReaderRaw<u8, u8>
pub fn cspi_lock_delay_time(&self) -> FieldReaderRaw<u8, u8>
Bits 7:11 - The lock delay time of SPI0/1 arbiter by spi0_slv_st, after PER is sent by SPI1.
Methods from Deref<Target = R<FSM_SPEC>>§
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
Reads raw bits from register.