Struct esp32c2_hal::pac::spi0::dout_mode::R

pub struct R(_);

Register DOUT_MODE reader

Implementations

impl R

pub fn dout0_mode(&self) -> BitReaderRaw<bool>

Bit 0 - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the posedge of clk_160,4 output with the negedge of clk_160,5: output with the spi_clk high edge ,6: output with the spi_clk low edge

pub fn dout1_mode(&self) -> BitReaderRaw<bool>

Bit 1 - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the posedge of clk_160,4 output with the negedge of clk_160,5: output with the spi_clk high edge ,6: output with the spi_clk low edge

pub fn dout2_mode(&self) -> BitReaderRaw<bool>

Bit 2 - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the posedge of clk_160,4 output with the negedge of clk_160,5: output with the spi_clk high edge ,6: output with the spi_clk low edge

pub fn dout3_mode(&self) -> BitReaderRaw<bool>

Bit 3 - the output signals are delayed by system clock cycles, 0: output without delayed, 1: output with the posedge of clk_apb,2 output with the negedge of clk_apb, 3: output with the posedge of clk_160,4 output with the negedge of clk_160,5: output with the spi_clk high edge ,6: output with the spi_clk low edge

Methods from Deref<Target = R<DOUT_MODE_SPEC>>

pub fn bits(&self) -> <REG as RegisterSpec>::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<DOUT_MODE_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<R as Deref>::Target

Dereferences the value.

impl From<R<DOUT_MODE_SPEC>> for R

fn from(reader: R<DOUT_MODE_SPEC>) -> R

Converts to this type from the input type.