Struct esp32c2_hal::pac::spi0::din_mode::R
pub struct R(_);
Expand description
Register DIN_MODE
reader
Implementations§
§impl R
impl R
pub fn din0_mode(&self) -> FieldReaderRaw<u8, u8>
pub fn din0_mode(&self) -> FieldReaderRaw<u8, u8>
Bits 0:1 - the input signals are delayed by system clock cycles, 0: input without delayed, 1: input with the posedge of clk_apb,2 input with the negedge of clk_apb, 3: input with the posedge of clk_160, 4 input with the negedge of clk_160, 5: input with the spi_clk high edge, 6: input with the spi_clk low edge
pub fn din1_mode(&self) -> FieldReaderRaw<u8, u8>
pub fn din1_mode(&self) -> FieldReaderRaw<u8, u8>
Bits 2:3 - the input signals are delayed by system clock cycles, 0: input without delayed, 1: input with the posedge of clk_apb,2 input with the negedge of clk_apb, 3: input with the posedge of clk_160, 4 input with the negedge of clk_160, 5: input with the spi_clk high edge, 6: input with the spi_clk low edge
pub fn din2_mode(&self) -> FieldReaderRaw<u8, u8>
pub fn din2_mode(&self) -> FieldReaderRaw<u8, u8>
Bits 4:5 - the input signals are delayed by system clock cycles, 0: input without delayed, 1: input with the posedge of clk_apb,2 input with the negedge of clk_apb, 3: input with the posedge of clk_160, 4 input with the negedge of clk_160, 5: input with the spi_clk high edge, 6: input with the spi_clk low edge
pub fn din3_mode(&self) -> FieldReaderRaw<u8, u8>
pub fn din3_mode(&self) -> FieldReaderRaw<u8, u8>
Bits 6:7 - the input signals are delayed by system clock cycles, 0: input without delayed, 1: input with the posedge of clk_apb,2 input with the negedge of clk_apb, 3: input with the posedge of clk_160, 4 input with the negedge of clk_160, 5: input with the spi_clk high edge, 6: input with the spi_clk low edge
Methods from Deref<Target = R<DIN_MODE_SPEC>>§
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
Reads raw bits from register.