Struct esp32c2_hal::pac::spi0::ctrl2::W

pub struct W(_);

Register CTRL2 writer

Implementations

impl W

pub fn cs_setup_time(
    &mut self
) -> FieldWriterRaw<'_, u32, CTRL2_SPEC, u8, u8, Unsafe, 5, 0>

Bits 0:4 - (cycles-1) of prepare phase by spi clock this bits are combined with spi_mem_cs_setup bit.

pub fn cs_hold_time(
    &mut self
) -> FieldWriterRaw<'_, u32, CTRL2_SPEC, u8, u8, Unsafe, 5, 5>

Bits 5:9 - Spi cs signal is delayed to inactive by spi clock this bits are combined with spi_mem_cs_hold bit.

pub fn cs_hold_delay(
    &mut self
) -> FieldWriterRaw<'_, u32, CTRL2_SPEC, u8, u8, Unsafe, 6, 25>

Bits 25:30 - These bits are used to set the minimum CS high time tSHSL between SPI burst transfer when accesses to flash. tSHSL is (SPI_MEM_CS_HOLD_DELAY[5:0] + 1) MSPI core clock cycles.

pub fn sync_reset(
    &mut self
) -> BitWriterRaw<'_, u32, CTRL2_SPEC, bool, BitM, 31>

Bit 31 - The FSM will be reset.

pub unsafe fn bits(&mut self, bits: u32) -> &mut W

Writes raw bits to the register.

Methods from Deref<Target = W<CTRL2_SPEC>>

pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>

Writes raw bits to the register.

Safety

Read datasheet or reference manual to find what values are allowed to pass.

Trait Implementations

impl Deref for W

type Target = W<CTRL2_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<W as Deref>::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut <W as Deref>::Target

Mutably dereferences the value.

impl From<W<CTRL2_SPEC>> for W

fn from(writer: W<CTRL2_SPEC>) -> W

Converts to this type from the input type.