Struct esp32c2_hal::pac::ledc::int_st::R
pub struct R(_);
Expand description
Register INT_ST
reader
Implementations§
§impl R
impl R
pub fn ovf_int_st(&self) -> BitReaderRaw<bool>
pub fn ovf_int_st(&self) -> BitReaderRaw<bool>
Bit 0 - This is the masked interrupt status bit for the LEDC_TIMER0_OVF_INT interrupt when LEDC_TIMER0_OVF_INT_ENA is set to 1.
pub fn timer1_ovf_int_st(&self) -> BitReaderRaw<bool>
pub fn timer1_ovf_int_st(&self) -> BitReaderRaw<bool>
Bit 1 - This is the masked interrupt status bit for the LEDC_TIMER1_OVF_INT interrupt when LEDC_TIMER1_OVF_INT_ENA is set to 1.
pub fn timer2_ovf_int_st(&self) -> BitReaderRaw<bool>
pub fn timer2_ovf_int_st(&self) -> BitReaderRaw<bool>
Bit 2 - This is the masked interrupt status bit for the LEDC_TIMER2_OVF_INT interrupt when LEDC_TIMER2_OVF_INT_ENA is set to 1.
pub fn timer3_ovf_int_st(&self) -> BitReaderRaw<bool>
pub fn timer3_ovf_int_st(&self) -> BitReaderRaw<bool>
Bit 3 - This is the masked interrupt status bit for the LEDC_TIMER3_OVF_INT interrupt when LEDC_TIMER3_OVF_INT_ENA is set to 1.
pub fn duty_chng_end_ch0_int_st(&self) -> BitReaderRaw<bool>
pub fn duty_chng_end_ch0_int_st(&self) -> BitReaderRaw<bool>
Bit 4 - This is the masked interrupt status bit for the LEDC_DUTY_CHNG_END_CH0_INT interrupt when LEDC_DUTY_CHNG_END_CH0_INT_ENAIS set to 1.
pub fn duty_chng_end_ch1_int_st(&self) -> BitReaderRaw<bool>
pub fn duty_chng_end_ch1_int_st(&self) -> BitReaderRaw<bool>
Bit 5 - This is the masked interrupt status bit for the LEDC_DUTY_CHNG_END_CH1_INT interrupt when LEDC_DUTY_CHNG_END_CH1_INT_ENAIS set to 1.
pub fn duty_chng_end_ch2_int_st(&self) -> BitReaderRaw<bool>
pub fn duty_chng_end_ch2_int_st(&self) -> BitReaderRaw<bool>
Bit 6 - This is the masked interrupt status bit for the LEDC_DUTY_CHNG_END_CH2_INT interrupt when LEDC_DUTY_CHNG_END_CH2_INT_ENAIS set to 1.
pub fn duty_chng_end_ch3_int_st(&self) -> BitReaderRaw<bool>
pub fn duty_chng_end_ch3_int_st(&self) -> BitReaderRaw<bool>
Bit 7 - This is the masked interrupt status bit for the LEDC_DUTY_CHNG_END_CH3_INT interrupt when LEDC_DUTY_CHNG_END_CH3_INT_ENAIS set to 1.
pub fn duty_chng_end_ch4_int_st(&self) -> BitReaderRaw<bool>
pub fn duty_chng_end_ch4_int_st(&self) -> BitReaderRaw<bool>
Bit 8 - This is the masked interrupt status bit for the LEDC_DUTY_CHNG_END_CH4_INT interrupt when LEDC_DUTY_CHNG_END_CH4_INT_ENAIS set to 1.
pub fn duty_chng_end_ch5_int_st(&self) -> BitReaderRaw<bool>
pub fn duty_chng_end_ch5_int_st(&self) -> BitReaderRaw<bool>
Bit 9 - This is the masked interrupt status bit for the LEDC_DUTY_CHNG_END_CH5_INT interrupt when LEDC_DUTY_CHNG_END_CH5_INT_ENAIS set to 1.
pub fn ovf_cnt_ch0_int_st(&self) -> BitReaderRaw<bool>
pub fn ovf_cnt_ch0_int_st(&self) -> BitReaderRaw<bool>
Bit 10 - This is the masked interrupt status bit for the LEDC_OVF_CNT_CH0_INT interrupt when LEDC_OVF_CNT_CH0_INT_ENA is set to 1.
pub fn ovf_cnt_ch1_int_st(&self) -> BitReaderRaw<bool>
pub fn ovf_cnt_ch1_int_st(&self) -> BitReaderRaw<bool>
Bit 11 - This is the masked interrupt status bit for the LEDC_OVF_CNT_CH1_INT interrupt when LEDC_OVF_CNT_CH1_INT_ENA is set to 1.
pub fn ovf_cnt_ch2_int_st(&self) -> BitReaderRaw<bool>
pub fn ovf_cnt_ch2_int_st(&self) -> BitReaderRaw<bool>
Bit 12 - This is the masked interrupt status bit for the LEDC_OVF_CNT_CH2_INT interrupt when LEDC_OVF_CNT_CH2_INT_ENA is set to 1.
pub fn ovf_cnt_ch3_int_st(&self) -> BitReaderRaw<bool>
pub fn ovf_cnt_ch3_int_st(&self) -> BitReaderRaw<bool>
Bit 13 - This is the masked interrupt status bit for the LEDC_OVF_CNT_CH3_INT interrupt when LEDC_OVF_CNT_CH3_INT_ENA is set to 1.
pub fn ovf_cnt_ch4_int_st(&self) -> BitReaderRaw<bool>
pub fn ovf_cnt_ch4_int_st(&self) -> BitReaderRaw<bool>
Bit 14 - This is the masked interrupt status bit for the LEDC_OVF_CNT_CH4_INT interrupt when LEDC_OVF_CNT_CH4_INT_ENA is set to 1.
pub fn ovf_cnt_ch5_int_st(&self) -> BitReaderRaw<bool>
pub fn ovf_cnt_ch5_int_st(&self) -> BitReaderRaw<bool>
Bit 15 - This is the masked interrupt status bit for the LEDC_OVF_CNT_CH5_INT interrupt when LEDC_OVF_CNT_CH5_INT_ENA is set to 1.
Methods from Deref<Target = R<INT_ST_SPEC>>§
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
Reads raw bits from register.