Struct esp32c2_hal::pac::i2c0::fifo_conf::R
pub struct R(_);
Expand description
Register FIFO_CONF
reader
Implementations§
§impl R
impl R
pub fn rxfifo_wm_thrhd(&self) -> FieldReaderRaw<u8, u8>
pub fn rxfifo_wm_thrhd(&self) -> FieldReaderRaw<u8, u8>
Bits 0:3 - The water mark threshold of rx FIFO in nonfifo access mode. When reg_reg_fifo_prt_en is 1 and rx FIFO counter is bigger than reg_rxfifo_wm_thrhd[3:0], reg_rxfifo_wm_int_raw bit will be valid.
pub fn txfifo_wm_thrhd(&self) -> FieldReaderRaw<u8, u8>
pub fn txfifo_wm_thrhd(&self) -> FieldReaderRaw<u8, u8>
Bits 5:8 - The water mark threshold of tx FIFO in nonfifo access mode. When reg_reg_fifo_prt_en is 1 and tx FIFO counter is smaller than reg_txfifo_wm_thrhd[3:0], reg_txfifo_wm_int_raw bit will be valid.
pub fn nonfifo_en(&self) -> BitReaderRaw<bool>
pub fn nonfifo_en(&self) -> BitReaderRaw<bool>
Bit 10 - Set this bit to enable APB nonfifo access.
pub fn rx_fifo_rst(&self) -> BitReaderRaw<bool>
pub fn rx_fifo_rst(&self) -> BitReaderRaw<bool>
Bit 12 - Set this bit to reset rx-fifo.
pub fn tx_fifo_rst(&self) -> BitReaderRaw<bool>
pub fn tx_fifo_rst(&self) -> BitReaderRaw<bool>
Bit 13 - Set this bit to reset tx-fifo.
pub fn fifo_prt_en(&self) -> BitReaderRaw<bool>
pub fn fifo_prt_en(&self) -> BitReaderRaw<bool>
Bit 14 - The control enable bit of FIFO pointer in non-fifo access mode. This bit controls the valid bits and the interrupts of tx/rx_fifo overflow, underflow, full and empty.
Methods from Deref<Target = R<FIFO_CONF_SPEC>>§
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
Reads raw bits from register.