Struct esp32c2_hal::pac::extmem::cache_ilg_int_st::R

pub struct R(_);

Register CACHE_ILG_INT_ST reader

Implementations

impl R

pub fn icache_sync_op_fault_st(&self) -> BitReaderRaw<bool>

Bit 0 - The bit is used to indicate interrupt by sync configurations fault.

pub fn icache_preload_op_fault_st(&self) -> BitReaderRaw<bool>

Bit 1 - The bit is used to indicate interrupt by preload configurations fault.

pub fn mmu_entry_fault_st(&self) -> BitReaderRaw<bool>

Bit 5 - The bit is used to indicate interrupt by mmu entry fault.

pub fn ibus_acs_cnt_ovf_st(&self) -> BitReaderRaw<bool>

Bit 7 - The bit is used to indicate interrupt by ibus access flash/spiram counter overflow.

pub fn ibus_acs_miss_cnt_ovf_st(&self) -> BitReaderRaw<bool>

Bit 8 - The bit is used to indicate interrupt by ibus access flash/spiram miss counter overflow.

pub fn dbus_acs_cnt_ovf_st(&self) -> BitReaderRaw<bool>

Bit 9 - The bit is used to indicate interrupt by dbus access flash/spiram counter overflow.

pub fn dbus_acs_flash_miss_cnt_ovf_st(&self) -> BitReaderRaw<bool>

Bit 10 - The bit is used to indicate interrupt by dbus access flash miss counter overflow.

Methods from Deref<Target = R<CACHE_ILG_INT_ST_SPEC>>

pub fn bits(&self) -> <REG as RegisterSpec>::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<CACHE_ILG_INT_ST_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<R as Deref>::Target

Dereferences the value.

impl From<R<CACHE_ILG_INT_ST_SPEC>> for R

fn from(reader: R<CACHE_ILG_INT_ST_SPEC>) -> R

Converts to this type from the input type.