scl_stop_hold.rs.html -- source

Files

esp32

aes

endian.rs idle.rs key_0.rs key_1.rs key_2.rs key_3.rs key_4.rs key_5.rs key_6.rs key_7.rs mode.rs start.rs text_0.rs text_1.rs text_2.rs text_3.rs

apb_ctrl

apb_saradc_ctrl.rs apb_saradc_ctrl2.rs apb_saradc_fsm.rs apb_saradc_sar1_patt_tab1.rs apb_saradc_sar1_patt_tab2.rs apb_saradc_sar1_patt_tab3.rs apb_saradc_sar1_patt_tab4.rs apb_saradc_sar2_patt_tab1.rs apb_saradc_sar2_patt_tab2.rs apb_saradc_sar2_patt_tab3.rs apb_saradc_sar2_patt_tab4.rs apll_tick_conf.rs ck8m_tick_conf.rs date.rs pll_tick_conf.rs sysclk_conf.rs xtal_tick_conf.rs

dport

access_check.rs ahb_lite_mask.rs ahb_mpu_table_0.rs ahb_mpu_table_1.rs ahblite_mpu_table_apb_ctrl.rs ahblite_mpu_table_bb.rs ahblite_mpu_table_bt.rs ahblite_mpu_table_bt_buffer.rs ahblite_mpu_table_btmac.rs ahblite_mpu_table_can.rs ahblite_mpu_table_efuse.rs ahblite_mpu_table_emac.rs ahblite_mpu_table_fe.rs ahblite_mpu_table_fe2.rs ahblite_mpu_table_gpio.rs ahblite_mpu_table_hinf.rs ahblite_mpu_table_i2c.rs ahblite_mpu_table_i2c_ext0.rs ahblite_mpu_table_i2c_ext1.rs ahblite_mpu_table_i2s0.rs ahblite_mpu_table_i2s1.rs ahblite_mpu_table_io_mux.rs ahblite_mpu_table_ledc.rs ahblite_mpu_table_misc.rs ahblite_mpu_table_pcnt.rs ahblite_mpu_table_pwm0.rs ahblite_mpu_table_pwm1.rs ahblite_mpu_table_pwm2.rs ahblite_mpu_table_pwm3.rs ahblite_mpu_table_pwr.rs ahblite_mpu_table_rmt.rs ahblite_mpu_table_rtc.rs ahblite_mpu_table_rwbt.rs ahblite_mpu_table_sdio_host.rs ahblite_mpu_table_slc.rs ahblite_mpu_table_slchost.rs ahblite_mpu_table_spi0.rs ahblite_mpu_table_spi1.rs ahblite_mpu_table_spi2.rs ahblite_mpu_table_spi3.rs ahblite_mpu_table_spi_encrypt.rs ahblite_mpu_table_timer.rs ahblite_mpu_table_timergroup.rs ahblite_mpu_table_timergroup1.rs ahblite_mpu_table_uart.rs ahblite_mpu_table_uart1.rs ahblite_mpu_table_uart2.rs ahblite_mpu_table_uhci0.rs ahblite_mpu_table_uhci1.rs ahblite_mpu_table_wdg.rs ahblite_mpu_table_wifimac.rs app_bb_int_map.rs app_boot_remap_ctrl.rs app_bt_bb_int_map.rs app_bt_bb_nmi_map.rs app_bt_mac_int_map.rs app_cache_ctrl.rs app_cache_ctrl1.rs app_cache_ia_int_map.rs app_cache_lock_0_addr.rs app_cache_lock_1_addr.rs app_cache_lock_2_addr.rs app_cache_lock_3_addr.rs app_can_int_map.rs app_cpu_intr_from_cpu_0_map.rs app_cpu_intr_from_cpu_1_map.rs app_cpu_intr_from_cpu_2_map.rs app_cpu_intr_from_cpu_3_map.rs app_cpu_record_ctrl.rs app_cpu_record_pdebugdata.rs app_cpu_record_pdebuginst.rs app_cpu_record_pdebugls0addr.rs app_cpu_record_pdebugls0data.rs app_cpu_record_pdebugls0stat.rs app_cpu_record_pdebugpc.rs app_cpu_record_pdebugstatus.rs app_cpu_record_pid.rs app_cpu_record_status.rs app_dcache_dbug0.rs app_dcache_dbug1.rs app_dcache_dbug2.rs app_dcache_dbug3.rs app_dcache_dbug4.rs app_dcache_dbug5.rs app_dcache_dbug6.rs app_dcache_dbug7.rs app_dcache_dbug8.rs app_dcache_dbug9.rs app_dport_apb_mask0.rs app_dport_apb_mask1.rs app_efuse_int_map.rs app_emac_int_map.rs app_gpio_interrupt_map.rs app_gpio_interrupt_nmi_map.rs app_i2c_ext0_intr_map.rs app_i2c_ext1_intr_map.rs app_i2s0_int_map.rs app_i2s1_int_map.rs app_intr_status_0.rs app_intr_status_1.rs app_intr_status_2.rs app_intrusion_ctrl.rs app_intrusion_status.rs app_ledc_int_map.rs app_mac_intr_map.rs app_mac_nmi_map.rs app_mmu_ia_int_map.rs app_mpu_ia_int_map.rs app_pcnt_intr_map.rs app_pwm0_intr_map.rs app_pwm1_intr_map.rs app_pwm2_intr_map.rs app_pwm3_intr_map.rs app_rmt_intr_map.rs app_rsa_intr_map.rs app_rtc_core_intr_map.rs app_rwble_irq_map.rs app_rwble_nmi_map.rs app_rwbt_irq_map.rs app_rwbt_nmi_map.rs app_sdio_host_interrupt_map.rs app_slc0_intr_map.rs app_slc1_intr_map.rs app_spi1_dma_int_map.rs app_spi2_dma_int_map.rs app_spi3_dma_int_map.rs app_spi_intr_0_map.rs app_spi_intr_1_map.rs app_spi_intr_2_map.rs app_spi_intr_3_map.rs app_tg1_lact_edge_int_map.rs app_tg1_lact_level_int_map.rs app_tg1_t0_edge_int_map.rs app_tg1_t0_level_int_map.rs app_tg1_t1_edge_int_map.rs app_tg1_t1_level_int_map.rs app_tg1_wdt_edge_int_map.rs app_tg1_wdt_level_int_map.rs app_tg_lact_edge_int_map.rs app_tg_lact_level_int_map.rs app_tg_t0_edge_int_map.rs app_tg_t0_level_int_map.rs app_tg_t1_edge_int_map.rs app_tg_t1_level_int_map.rs app_tg_wdt_edge_int_map.rs app_tg_wdt_level_int_map.rs app_timer_int1_map.rs app_timer_int2_map.rs app_tracemem_ena.rs app_uart1_intr_map.rs app_uart2_intr_map.rs app_uart_intr_map.rs app_uhci0_intr_map.rs app_uhci1_intr_map.rs app_vecbase_ctrl.rs app_vecbase_set.rs app_wdg_int_map.rs appcpu_ctrl_a.rs appcpu_ctrl_b.rs appcpu_ctrl_c.rs appcpu_ctrl_d.rs bt_lpck_div_frac.rs bt_lpck_div_int.rs cache_ia_int_en.rs cache_mux_mode.rs core_rst_en.rs cpu_intr_from_cpu_0.rs cpu_intr_from_cpu_1.rs cpu_intr_from_cpu_2.rs cpu_intr_from_cpu_3.rs cpu_per_conf.rs date.rs dmmu_page_mode.rs dmmu_table0.rs dmmu_table1.rs dmmu_table10.rs dmmu_table11.rs dmmu_table12.rs dmmu_table13.rs dmmu_table14.rs dmmu_table15.rs dmmu_table2.rs dmmu_table3.rs dmmu_table4.rs dmmu_table5.rs dmmu_table6.rs dmmu_table7.rs dmmu_table8.rs dmmu_table9.rs front_end_mem_pd.rs host_inf_sel.rs immu_page_mode.rs immu_table0.rs immu_table1.rs immu_table10.rs immu_table11.rs immu_table12.rs immu_table13.rs immu_table14.rs immu_table15.rs immu_table2.rs immu_table3.rs immu_table4.rs immu_table5.rs immu_table6.rs immu_table7.rs immu_table8.rs immu_table9.rs iram_dram_ahb_sel.rs mem_access_dbug0.rs mem_access_dbug1.rs mem_pd_mask.rs mmu_ia_int_en.rs mpu_ia_int_en.rs peri_clk_en.rs peri_rst_en.rs perip_clk_en.rs perip_rst_en.rs pro_bb_int_map.rs pro_boot_remap_ctrl.rs pro_bt_bb_int_map.rs pro_bt_bb_nmi_map.rs pro_bt_mac_int_map.rs pro_cache_ctrl.rs pro_cache_ctrl1.rs pro_cache_ia_int_map.rs pro_cache_lock_0_addr.rs pro_cache_lock_1_addr.rs pro_cache_lock_2_addr.rs pro_cache_lock_3_addr.rs pro_can_int_map.rs pro_cpu_intr_from_cpu_0_map.rs pro_cpu_intr_from_cpu_1_map.rs pro_cpu_intr_from_cpu_2_map.rs pro_cpu_intr_from_cpu_3_map.rs pro_cpu_record_ctrl.rs pro_cpu_record_pdebugdata.rs pro_cpu_record_pdebuginst.rs pro_cpu_record_pdebugls0addr.rs pro_cpu_record_pdebugls0data.rs pro_cpu_record_pdebugls0stat.rs pro_cpu_record_pdebugpc.rs pro_cpu_record_pdebugstatus.rs pro_cpu_record_pid.rs pro_cpu_record_status.rs pro_dcache_dbug0.rs pro_dcache_dbug1.rs pro_dcache_dbug2.rs pro_dcache_dbug3.rs pro_dcache_dbug4.rs pro_dcache_dbug5.rs pro_dcache_dbug6.rs pro_dcache_dbug7.rs pro_dcache_dbug8.rs pro_dcache_dbug9.rs pro_dport_apb_mask0.rs pro_dport_apb_mask1.rs pro_efuse_int_map.rs pro_emac_int_map.rs pro_gpio_interrupt_map.rs pro_gpio_interrupt_nmi_map.rs pro_i2c_ext0_intr_map.rs pro_i2c_ext1_intr_map.rs pro_i2s0_int_map.rs pro_i2s1_int_map.rs pro_intr_status_0.rs pro_intr_status_1.rs pro_intr_status_2.rs pro_intrusion_ctrl.rs pro_intrusion_status.rs pro_ledc_int_map.rs pro_mac_intr_map.rs pro_mac_nmi_map.rs pro_mmu_ia_int_map.rs pro_mpu_ia_int_map.rs pro_pcnt_intr_map.rs pro_pwm0_intr_map.rs pro_pwm1_intr_map.rs pro_pwm2_intr_map.rs pro_pwm3_intr_map.rs pro_rmt_intr_map.rs pro_rsa_intr_map.rs pro_rtc_core_intr_map.rs pro_rwble_irq_map.rs pro_rwble_nmi_map.rs pro_rwbt_irq_map.rs pro_rwbt_nmi_map.rs pro_sdio_host_interrupt_map.rs pro_slc0_intr_map.rs pro_slc1_intr_map.rs pro_spi1_dma_int_map.rs pro_spi2_dma_int_map.rs pro_spi3_dma_int_map.rs pro_spi_intr_0_map.rs pro_spi_intr_1_map.rs pro_spi_intr_2_map.rs pro_spi_intr_3_map.rs pro_tg1_lact_edge_int_map.rs pro_tg1_lact_level_int_map.rs pro_tg1_t0_edge_int_map.rs pro_tg1_t0_level_int_map.rs pro_tg1_t1_edge_int_map.rs pro_tg1_t1_level_int_map.rs pro_tg1_wdt_edge_int_map.rs pro_tg1_wdt_level_int_map.rs pro_tg_lact_edge_int_map.rs pro_tg_lact_level_int_map.rs pro_tg_t0_edge_int_map.rs pro_tg_t0_level_int_map.rs pro_tg_t1_edge_int_map.rs pro_tg_t1_level_int_map.rs pro_tg_wdt_edge_int_map.rs pro_tg_wdt_level_int_map.rs pro_timer_int1_map.rs pro_timer_int2_map.rs pro_tracemem_ena.rs pro_uart1_intr_map.rs pro_uart2_intr_map.rs pro_uart_intr_map.rs pro_uhci0_intr_map.rs pro_uhci1_intr_map.rs pro_vecbase_ctrl.rs pro_vecbase_set.rs pro_wdg_int_map.rs rom_fo_ctrl.rs rom_mpu_ena.rs rom_mpu_table0.rs rom_mpu_table1.rs rom_mpu_table2.rs rom_mpu_table3.rs rom_pd_ctrl.rs rsa_pd_ctrl.rs secure_boot_ctrl.rs shrom_mpu_table0.rs shrom_mpu_table1.rs shrom_mpu_table10.rs shrom_mpu_table11.rs shrom_mpu_table12.rs shrom_mpu_table13.rs shrom_mpu_table14.rs shrom_mpu_table15.rs shrom_mpu_table16.rs shrom_mpu_table17.rs shrom_mpu_table18.rs shrom_mpu_table19.rs shrom_mpu_table2.rs shrom_mpu_table20.rs shrom_mpu_table21.rs shrom_mpu_table22.rs shrom_mpu_table23.rs shrom_mpu_table3.rs shrom_mpu_table4.rs shrom_mpu_table5.rs shrom_mpu_table6.rs shrom_mpu_table7.rs shrom_mpu_table8.rs shrom_mpu_table9.rs spi_dma_chan_sel.rs sram_fo_ctrl_0.rs sram_fo_ctrl_1.rs sram_pd_ctrl_0.rs sram_pd_ctrl_1.rs tag_fo_ctrl.rs tracemem_mux_mode.rs wifi_bb_cfg.rs wifi_bb_cfg_2.rs wifi_clk_en.rs

efuse

blk0_rdata0.rs blk0_rdata1.rs blk0_rdata2.rs blk0_rdata3.rs blk0_rdata4.rs blk0_rdata5.rs blk0_rdata6.rs blk0_wdata0.rs blk0_wdata1.rs blk0_wdata2.rs blk0_wdata3.rs blk0_wdata4.rs blk0_wdata5.rs blk0_wdata6.rs blk1_rdata0.rs blk1_rdata1.rs blk1_rdata2.rs blk1_rdata3.rs blk1_rdata4.rs blk1_rdata5.rs blk1_rdata6.rs blk1_rdata7.rs blk1_wdata0.rs blk1_wdata1.rs blk1_wdata2.rs blk1_wdata3.rs blk1_wdata4.rs blk1_wdata5.rs blk1_wdata6.rs blk1_wdata7.rs blk2_rdata0.rs blk2_rdata1.rs blk2_rdata2.rs blk2_rdata3.rs blk2_rdata4.rs blk2_rdata5.rs blk2_rdata6.rs blk2_rdata7.rs blk2_wdata0.rs blk2_wdata1.rs blk2_wdata2.rs blk2_wdata3.rs blk2_wdata4.rs blk2_wdata5.rs blk2_wdata6.rs blk2_wdata7.rs blk3_rdata0.rs blk3_rdata1.rs blk3_rdata2.rs blk3_rdata3.rs blk3_rdata4.rs blk3_rdata5.rs blk3_rdata6.rs blk3_rdata7.rs blk3_wdata0.rs blk3_wdata1.rs blk3_wdata2.rs blk3_wdata3.rs blk3_wdata4.rs blk3_wdata5.rs blk3_wdata6.rs blk3_wdata7.rs clk.rs cmd.rs conf.rs dac_conf.rs date.rs dec_status.rs int_clr.rs int_ena.rs int_raw.rs int_st.rs status.rs

gpio

gpio_sd

sigmadelta0.rs sigmadelta1.rs sigmadelta2.rs sigmadelta3.rs sigmadelta4.rs sigmadelta5.rs sigmadelta6.rs sigmadelta7.rs sigmadelta_cg.rs sigmadelta_misc.rs sigmadelta_version.rs

hinf

cfg_data0.rs cfg_data1.rs cfg_data16.rs cfg_data7.rs cis_conf0.rs cis_conf1.rs cis_conf2.rs cis_conf3.rs cis_conf4.rs cis_conf5.rs cis_conf6.rs cis_conf7.rs date.rs

i2c

i2s

io_mux

ledc

conf.rs date.rs hsch0_conf0.rs hsch0_conf1.rs hsch0_duty.rs hsch0_duty_r.rs hsch0_hpoint.rs hsch1_conf0.rs hsch1_conf1.rs hsch1_duty.rs hsch1_duty_r.rs hsch1_hpoint.rs hsch2_conf0.rs hsch2_conf1.rs hsch2_duty.rs hsch2_duty_r.rs hsch2_hpoint.rs hsch3_conf0.rs hsch3_conf1.rs hsch3_duty.rs hsch3_duty_r.rs hsch3_hpoint.rs hsch4_conf0.rs hsch4_conf1.rs hsch4_duty.rs hsch4_duty_r.rs hsch4_hpoint.rs hsch5_conf0.rs hsch5_conf1.rs hsch5_duty.rs hsch5_duty_r.rs hsch5_hpoint.rs hsch6_conf0.rs hsch6_conf1.rs hsch6_duty.rs hsch6_duty_r.rs hsch6_hpoint.rs hsch7_conf0.rs hsch7_conf1.rs hsch7_duty.rs hsch7_duty_r.rs hsch7_hpoint.rs hstimer0_conf.rs hstimer0_value.rs hstimer1_conf.rs hstimer1_value.rs hstimer2_conf.rs hstimer2_value.rs hstimer3_conf.rs hstimer3_value.rs int_clr.rs int_ena.rs int_raw.rs int_st.rs lsch0_conf0.rs lsch0_conf1.rs lsch0_duty.rs lsch0_duty_r.rs lsch0_hpoint.rs lsch1_conf0.rs lsch1_conf1.rs lsch1_duty.rs lsch1_duty_r.rs lsch1_hpoint.rs lsch2_conf0.rs lsch2_conf1.rs lsch2_duty.rs lsch2_duty_r.rs lsch2_hpoint.rs lsch3_conf0.rs lsch3_conf1.rs lsch3_duty.rs lsch3_duty_r.rs lsch3_hpoint.rs lsch4_conf0.rs lsch4_conf1.rs lsch4_duty.rs lsch4_duty_r.rs lsch4_hpoint.rs lsch5_conf0.rs lsch5_conf1.rs lsch5_duty.rs lsch5_duty_r.rs lsch5_hpoint.rs lsch6_conf0.rs lsch6_conf1.rs lsch6_duty.rs lsch6_duty_r.rs lsch6_hpoint.rs lsch7_conf0.rs lsch7_conf1.rs lsch7_duty.rs lsch7_duty_r.rs lsch7_hpoint.rs lstimer0_conf.rs lstimer0_value.rs lstimer1_conf.rs lstimer1_value.rs lstimer2_conf.rs lstimer2_value.rs lstimer3_conf.rs lstimer3_value.rs

mcpwm

cap_ch0.rs cap_ch0_cfg.rs cap_ch1.rs cap_ch1_cfg.rs cap_ch2.rs cap_ch2_cfg.rs cap_status.rs cap_timer_cfg.rs cap_timer_phase.rs carrier0_cfg.rs carrier1_cfg.rs carrier2_cfg.rs clk.rs clk_cfg.rs dt0_cfg.rs dt0_fed_cfg.rs dt0_red_cfg.rs dt1_cfg.rs dt1_fed_cfg.rs dt1_red_cfg.rs dt2_cfg.rs dt2_fed_cfg.rs dt2_red_cfg.rs fault_detect.rs fh0_cfg0.rs fh0_cfg1.rs fh0_status.rs fh1_cfg0.rs fh1_cfg1.rs fh1_status.rs fh2_cfg0.rs fh2_cfg1.rs fh2_status.rs gen0_a.rs gen0_b.rs gen0_cfg0.rs gen0_force.rs gen0_stmp_cfg.rs gen0_tstmp_a.rs gen0_tstmp_b.rs gen1_a.rs gen1_b.rs gen1_cfg0.rs gen1_force.rs gen1_stmp_cfg.rs gen1_tstmp_a.rs gen1_tstmp_b.rs gen2_a.rs gen2_b.rs gen2_cfg0.rs gen2_force.rs gen2_stmp_cfg.rs gen2_tstmp_a.rs gen2_tstmp_b.rs mcmcpwm_int_clr_mcpwm.rs mcmcpwm_int_ena_mcpwm.rs mcmcpwm_int_raw_mcpwm.rs mcmcpwm_int_st_mcpwm.rs operator_timersel.rs timer0_cfg0.rs timer0_cfg1.rs timer0_status.rs timer0_sync.rs timer1_cfg0.rs timer1_cfg1.rs timer1_status.rs timer1_sync.rs timer2_cfg0.rs timer2_cfg1.rs timer2_status.rs timer2_sync.rs timer_synci_cfg.rs update_cfg.rs version.rs

pcnt

rmt

rtc_i2c

ctrl.rs debug_status.rs int_clr.rs int_raw.rs scl_high_period.rs scl_low_period.rs scl_start_period.rs scl_stop_period.rs sda_duty.rs slave_addr.rs timeout.rs

rtccntl

rtcio

sens

slc

_0_done_dscr_addr.rs _0_dscr_cnt.rs _0_dscr_rec_conf.rs _0_eof_start_des.rs _0_len_conf.rs _0_len_lim_conf.rs _0_length.rs _0_push_dscr_addr.rs _0_rxlink_dscr.rs _0_rxlink_dscr_bf0.rs _0_rxlink_dscr_bf1.rs _0_rxpkt_e_dscr.rs _0_rxpkt_h_dscr.rs _0_rxpktu_e_dscr.rs _0_rxpktu_h_dscr.rs _0_state0.rs _0_state1.rs _0_sub_start_des.rs _0_to_eof_bfr_des_addr.rs _0_to_eof_des_addr.rs _0_tx_eof_des_addr.rs _0_tx_erreof_des_addr.rs _0_txlink_dscr.rs _0_txlink_dscr_bf0.rs _0_txlink_dscr_bf1.rs _0_txpkt_e_dscr.rs _0_txpkt_h_dscr.rs _0_txpktu_e_dscr.rs _0_txpktu_h_dscr.rs _0int_clr.rs _0int_ena.rs _0int_ena1.rs _0int_raw.rs _0int_st.rs _0int_st1.rs _0rx_link.rs _0rxfifo_push.rs _0token0.rs _0token1.rs _0tx_link.rs _0txfifo_pop.rs _1_rxlink_dscr.rs _1_rxlink_dscr_bf0.rs _1_rxlink_dscr_bf1.rs _1_state0.rs _1_state1.rs _1_to_eof_bfr_des_addr.rs _1_to_eof_des_addr.rs _1_tx_eof_des_addr.rs _1_tx_erreof_des_addr.rs _1_txlink_dscr.rs _1_txlink_dscr_bf0.rs _1_txlink_dscr_bf1.rs _1int_clr.rs _1int_ena.rs _1int_ena1.rs _1int_raw.rs _1int_st.rs _1int_st1.rs _1rx_link.rs _1rxfifo_push.rs _1token0.rs _1token1.rs _1tx_link.rs _1txfifo_pop.rs ahb_test.rs bridge_conf.rs cmd_infor0.rs cmd_infor1.rs conf0.rs conf1.rs date.rs id.rs intvec_tohost.rs rx_dscr_conf.rs rx_status.rs sdio_crc_st0.rs sdio_crc_st1.rs sdio_st.rs seq_position.rs token_lat.rs tx_dscr_conf.rs tx_status.rs

slchost

host_slc0_host_pf.rs host_slc0host_func1_int_ena.rs host_slc0host_func2_int_ena.rs host_slc0host_int_clr.rs host_slc0host_int_ena.rs host_slc0host_int_ena1.rs host_slc0host_int_raw.rs host_slc0host_int_st.rs host_slc0host_len_wd.rs host_slc0host_rx_infor.rs host_slc0host_token_rdata.rs host_slc0host_token_wdata.rs host_slc1_host_pf.rs host_slc1host_func1_int_ena.rs host_slc1host_func2_int_ena.rs host_slc1host_int_clr.rs host_slc1host_int_ena.rs host_slc1host_int_ena1.rs host_slc1host_int_raw.rs host_slc1host_int_st.rs host_slc1host_rx_infor.rs host_slc1host_token_rdata.rs host_slc1host_token_wdata.rs host_slc_apbwin_conf.rs host_slc_apbwin_rdata.rs host_slc_apbwin_wdata.rs host_slchost_check_sum0.rs host_slchost_check_sum1.rs host_slchost_conf.rs host_slchost_conf_w0.rs host_slchost_conf_w1.rs host_slchost_conf_w10.rs host_slchost_conf_w11.rs host_slchost_conf_w12.rs host_slchost_conf_w13.rs host_slchost_conf_w14.rs host_slchost_conf_w15.rs host_slchost_conf_w2.rs host_slchost_conf_w3.rs host_slchost_conf_w4.rs host_slchost_conf_w5.rs host_slchost_conf_w6.rs host_slchost_conf_w7.rs host_slchost_conf_w8.rs host_slchost_conf_w9.rs host_slchost_func2_0.rs host_slchost_func2_1.rs host_slchost_func2_2.rs host_slchost_gpio_in0.rs host_slchost_gpio_in1.rs host_slchost_gpio_status0.rs host_slchost_gpio_status1.rs host_slchost_inf_st.rs host_slchost_pkt_len.rs host_slchost_pkt_len0.rs host_slchost_pkt_len1.rs host_slchost_pkt_len2.rs host_slchost_rdclr0.rs host_slchost_rdclr1.rs host_slchost_state_w0.rs host_slchost_state_w1.rs host_slchost_token_con.rs host_slchostdate.rs host_slchostid.rs

spi

syscon

apll_tick_conf.rs ck8m_tick_conf.rs date.rs pll_tick_conf.rs saradc_ctrl.rs saradc_ctrl2.rs saradc_fsm.rs saradc_sar1_patt_tab1.rs saradc_sar1_patt_tab2.rs saradc_sar1_patt_tab3.rs saradc_sar1_patt_tab4.rs saradc_sar2_patt_tab1.rs saradc_sar2_patt_tab2.rs saradc_sar2_patt_tab3.rs saradc_sar2_patt_tab4.rs sysclk_conf.rs xtal_tick_conf.rs

timg

uart

uhci

#[doc = "Reader of register SCL_STOP_HOLD"]
pub type R = crate::R<u32, super::SCL_STOP_HOLD>;
#[doc = "Writer for register SCL_STOP_HOLD"]
pub type W = crate::W<u32, super::SCL_STOP_HOLD>;
#[doc = "Register SCL_STOP_HOLD `reset()`'s with value 0"]
impl crate::ResetValue for super::SCL_STOP_HOLD {
    #[inline(always)]
    fn reset_value() -> Self::Ux {
        0
    }
}
#[doc = "Reader of field `TIME`"]
pub type TIME_R = crate::R<u16, u16>;
#[doc = "Write proxy for field `TIME`"]
pub struct TIME_W<'a> {
    w: &'a mut W,
}
impl<'a> TIME_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u16) -> &'a mut W {
        self.w.bits = (self.w.bits & !0x3fff) | ((value as u32) & 0x3fff);
        self.w
    }
}
impl R {
    #[doc = "Bits 0:13"]
    #[inline(always)]
    pub fn time(&self) -> TIME_R {
        TIME_R::new((self.bits & 0x3fff) as u16)
    }
}
impl W {
    #[doc = "Bits 0:13"]
    #[inline(always)]
    pub fn time(&mut self) -> TIME_W {
        TIME_W { w: self }
    }
}

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