1
  2
  3
  4
  5
  6
  7
  8
  9
 10
 11
 12
 13
 14
 15
 16
 17
 18
 19
 20
 21
 22
 23
 24
 25
 26
 27
 28
 29
 30
 31
 32
 33
 34
 35
 36
 37
 38
 39
 40
 41
 42
 43
 44
 45
 46
 47
 48
 49
 50
 51
 52
 53
 54
 55
 56
 57
 58
 59
 60
 61
 62
 63
 64
 65
 66
 67
 68
 69
 70
 71
 72
 73
 74
 75
 76
 77
 78
 79
 80
 81
 82
 83
 84
 85
 86
 87
 88
 89
 90
 91
 92
 93
 94
 95
 96
 97
 98
 99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
#[doc = "Reader of register TIMER0_SYNC"]
pub type R = crate::R<u32, super::TIMER0_SYNC>;
#[doc = "Writer for register TIMER0_SYNC"]
pub type W = crate::W<u32, super::TIMER0_SYNC>;
#[doc = "Register TIMER0_SYNC `reset()`'s with value 0"]
impl crate::ResetValue for super::TIMER0_SYNC {
    #[inline(always)]
    fn reset_value() -> Self::Ux {
        0
    }
}
#[doc = "Reader of field `TIMER0_PHASE`"]
pub type TIMER0_PHASE_R = crate::R<u32, u32>;
#[doc = "Write proxy for field `TIMER0_PHASE`"]
pub struct TIMER0_PHASE_W<'a> {
    w: &'a mut W,
}
impl<'a> TIMER0_PHASE_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u32) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x0001_ffff << 4)) | (((value as u32) & 0x0001_ffff) << 4);
        self.w
    }
}
#[doc = "Reader of field `TIMER0_SYNCO_SEL`"]
pub type TIMER0_SYNCO_SEL_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `TIMER0_SYNCO_SEL`"]
pub struct TIMER0_SYNCO_SEL_W<'a> {
    w: &'a mut W,
}
impl<'a> TIMER0_SYNCO_SEL_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x03 << 2)) | (((value as u32) & 0x03) << 2);
        self.w
    }
}
#[doc = "Reader of field `TIMER0_SYNC_SW`"]
pub type TIMER0_SYNC_SW_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `TIMER0_SYNC_SW`"]
pub struct TIMER0_SYNC_SW_W<'a> {
    w: &'a mut W,
}
impl<'a> TIMER0_SYNC_SW_W<'a> {
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
        self.w
    }
}
#[doc = "Reader of field `TIMER0_SYNCI_EN`"]
pub type TIMER0_SYNCI_EN_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `TIMER0_SYNCI_EN`"]
pub struct TIMER0_SYNCI_EN_W<'a> {
    w: &'a mut W,
}
impl<'a> TIMER0_SYNCI_EN_W<'a> {
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
        self.w
    }
}
impl R {
    #[doc = "Bits 4:20"]
    #[inline(always)]
    pub fn timer0_phase(&self) -> TIMER0_PHASE_R {
        TIMER0_PHASE_R::new(((self.bits >> 4) & 0x0001_ffff) as u32)
    }
    #[doc = "Bits 2:3"]
    #[inline(always)]
    pub fn timer0_synco_sel(&self) -> TIMER0_SYNCO_SEL_R {
        TIMER0_SYNCO_SEL_R::new(((self.bits >> 2) & 0x03) as u8)
    }
    #[doc = "Bit 1"]
    #[inline(always)]
    pub fn timer0_sync_sw(&self) -> TIMER0_SYNC_SW_R {
        TIMER0_SYNC_SW_R::new(((self.bits >> 1) & 0x01) != 0)
    }
    #[doc = "Bit 0"]
    #[inline(always)]
    pub fn timer0_synci_en(&self) -> TIMER0_SYNCI_EN_R {
        TIMER0_SYNCI_EN_R::new((self.bits & 0x01) != 0)
    }
}
impl W {
    #[doc = "Bits 4:20"]
    #[inline(always)]
    pub fn timer0_phase(&mut self) -> TIMER0_PHASE_W {
        TIMER0_PHASE_W { w: self }
    }
    #[doc = "Bits 2:3"]
    #[inline(always)]
    pub fn timer0_synco_sel(&mut self) -> TIMER0_SYNCO_SEL_W {
        TIMER0_SYNCO_SEL_W { w: self }
    }
    #[doc = "Bit 1"]
    #[inline(always)]
    pub fn timer0_sync_sw(&mut self) -> TIMER0_SYNC_SW_W {
        TIMER0_SYNC_SW_W { w: self }
    }
    #[doc = "Bit 0"]
    #[inline(always)]
    pub fn timer0_synci_en(&mut self) -> TIMER0_SYNCI_EN_W {
        TIMER0_SYNCI_EN_W { w: self }
    }
}