Struct esp32_hal::pac::spi0::sram_dwr_cmd::W
pub struct W(_);
Expand description
Register SRAM_DWR_CMD
writer
Implementations§
§impl W
impl W
pub fn cache_sram_usr_wr_cmd_value(
&mut self
) -> FieldWriterRaw<'_, u32, SRAM_DWR_CMD_SPEC, u16, u16, Unsafe, 16, 0>
pub fn cache_sram_usr_wr_cmd_value(
&mut self
) -> FieldWriterRaw<'_, u32, SRAM_DWR_CMD_SPEC, u16, u16, Unsafe, 16, 0>
Bits 0:15 - For SPI0 When cache mode is enable it is the write command value of command phase for SRAM.
pub fn cache_sram_usr_wr_cmd_bitlen(
&mut self
) -> FieldWriterRaw<'_, u32, SRAM_DWR_CMD_SPEC, u8, u8, Unsafe, 4, 28>
pub fn cache_sram_usr_wr_cmd_bitlen(
&mut self
) -> FieldWriterRaw<'_, u32, SRAM_DWR_CMD_SPEC, u8, u8, Unsafe, 4, 28>
Bits 28:31 - For SPI0 When cache mode is enable it is the in bits of command phase for SRAM. The register value shall be (bit_num-1).
Methods from Deref<Target = W<SRAM_DWR_CMD_SPEC>>§
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.
Safety
Read datasheet or reference manual to find what values are allowed to pass.
Trait Implementations§
§impl From<W<SRAM_DWR_CMD_SPEC>> for W
impl From<W<SRAM_DWR_CMD_SPEC>> for W
§fn from(writer: W<SRAM_DWR_CMD_SPEC>) -> W
fn from(writer: W<SRAM_DWR_CMD_SPEC>) -> W
Converts to this type from the input type.