Struct esp32_hal::pac::spi0::sram_dwr_cmd::R

pub struct R(_);

Register SRAM_DWR_CMD reader

Implementations

impl R

pub fn cache_sram_usr_wr_cmd_value(&self) -> FieldReaderRaw<u16, u16>

Bits 0:15 - For SPI0 When cache mode is enable it is the write command value of command phase for SRAM.

pub fn cache_sram_usr_wr_cmd_bitlen(&self) -> FieldReaderRaw<u8, u8>

Bits 28:31 - For SPI0 When cache mode is enable it is the in bits of command phase for SRAM. The register value shall be (bit_num-1).

Methods from Deref<Target = R<SRAM_DWR_CMD_SPEC>>

pub fn bits(&self) -> <REG as RegisterSpec>::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<SRAM_DWR_CMD_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<R as Deref>::Target

Dereferences the value.

impl From<R<SRAM_DWR_CMD_SPEC>> for R

fn from(reader: R<SRAM_DWR_CMD_SPEC>) -> R

Converts to this type from the input type.