Struct esp32_hal::pac::sens::sar_touch_ctrl1::R
pub struct R(_);
Expand description
Register SAR_TOUCH_CTRL1
reader
Implementations§
§impl R
impl R
pub fn touch_meas_delay(&self) -> FieldReaderRaw<u16, u16>
pub fn touch_meas_delay(&self) -> FieldReaderRaw<u16, u16>
Bits 0:15 - the meas length (in 8MHz)
pub fn touch_xpd_wait(&self) -> FieldReaderRaw<u8, u8>
pub fn touch_xpd_wait(&self) -> FieldReaderRaw<u8, u8>
Bits 16:23 - the waiting cycles (in 8MHz) between TOUCH_START and TOUCH_XPD
pub fn touch_out_sel(&self) -> BitReaderRaw<bool>
pub fn touch_out_sel(&self) -> BitReaderRaw<bool>
Bit 24 - 1: when the counter is greater then the threshold the touch pad is considered as “touched” 0: when the counter is less than the threshold the touch pad is considered as “touched”
pub fn touch_out_1en(&self) -> BitReaderRaw<bool>
pub fn touch_out_1en(&self) -> BitReaderRaw<bool>
Bit 25 - 1: wakeup interrupt is generated if SET1 is “touched” 0: wakeup interrupt is generated only if SET1 & SET2 is both “touched”
pub fn xpd_hall_force(&self) -> BitReaderRaw<bool>
pub fn xpd_hall_force(&self) -> BitReaderRaw<bool>
Bit 26 - 1: XPD HALL is controlled by SW. 0: XPD HALL is controlled by FSM in ULP-coprocessor
pub fn hall_phase_force(&self) -> BitReaderRaw<bool>
pub fn hall_phase_force(&self) -> BitReaderRaw<bool>
Bit 27 - 1: HALL PHASE is controlled by SW 0: HALL PHASE is controlled by FSM in ULP-coprocessor
Methods from Deref<Target = R<SAR_TOUCH_CTRL1_SPEC>>§
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
Reads raw bits from register.
Trait Implementations§
§impl From<R<SAR_TOUCH_CTRL1_SPEC>> for R
impl From<R<SAR_TOUCH_CTRL1_SPEC>> for R
§fn from(reader: R<SAR_TOUCH_CTRL1_SPEC>) -> R
fn from(reader: R<SAR_TOUCH_CTRL1_SPEC>) -> R
Converts to this type from the input type.