pub struct R(_);
Expand description
Register CH%sCONF1
reader
Implementations§
§impl R
impl R
pub fn tx_start(&self) -> BitReaderRaw<bool>
pub fn tx_start(&self) -> BitReaderRaw<bool>
Bit 0 - Set this bit to start sending data for channel0.
pub fn mem_wr_rst(&self) -> BitReaderRaw<bool>
pub fn mem_wr_rst(&self) -> BitReaderRaw<bool>
Bit 2 - Set this bit to reset write ram address for channel0 by receiver access.
pub fn mem_rd_rst(&self) -> BitReaderRaw<bool>
pub fn mem_rd_rst(&self) -> BitReaderRaw<bool>
Bit 3 - Set this bit to reset read ram address for channel0 by transmitter access.
pub fn apb_mem_rst(&self) -> BitReaderRaw<bool>
pub fn apb_mem_rst(&self) -> BitReaderRaw<bool>
Bit 4 - Set this bit to reset W/R ram address for channel0 by apb fifo access
pub fn mem_owner(&self) -> BitReaderRaw<bool>
pub fn mem_owner(&self) -> BitReaderRaw<bool>
Bit 5 - This is the mark of channel0’s ram usage right.1’b1:receiver uses the ram 0:transmitter uses the ram
pub fn tx_conti_mode(&self) -> BitReaderRaw<bool>
pub fn tx_conti_mode(&self) -> BitReaderRaw<bool>
Bit 6 - Set this bit to continue sending from the first data to the last data in channel0 again and again.
pub fn rx_filter_en(&self) -> BitReaderRaw<bool>
pub fn rx_filter_en(&self) -> BitReaderRaw<bool>
Bit 7 - This is the receive filter enable bit for channel0.
pub fn rx_filter_thres(&self) -> FieldReaderRaw<u8, u8>
pub fn rx_filter_thres(&self) -> FieldReaderRaw<u8, u8>
Bits 8:15 - in receive mode channel0 ignore input pulse when the pulse width is smaller then this value.
pub fn ref_cnt_rst(&self) -> BitReaderRaw<bool>
pub fn ref_cnt_rst(&self) -> BitReaderRaw<bool>
Bit 16 - This bit is used to reset divider in channel0.
pub fn ref_always_on(&self) -> BitReaderRaw<bool>
pub fn ref_always_on(&self) -> BitReaderRaw<bool>
Bit 17 - This bit is used to select base clock. 1’b1:clk_apb 1’b0:clk_ref
pub fn idle_out_lv(&self) -> BitReaderRaw<bool>
pub fn idle_out_lv(&self) -> BitReaderRaw<bool>
Bit 18 - This bit configures the output signal’s level for channel0 in IDLE state.
pub fn idle_out_en(&self) -> BitReaderRaw<bool>
pub fn idle_out_en(&self) -> BitReaderRaw<bool>
Bit 19 - This is the output enable control bit for channel0 in IDLE state.
Methods from Deref<Target = R<CHCONF1_SPEC>>§
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
Reads raw bits from register.