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= "vj-codegen"
= true
= true
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= "LLVM code generator of the vj SystemVerilog simulator."
= "README.md"
= ["systemverilog", "simulator", "hdl", "eda", "verilog"]
= ["simulation", "development-tools"]
= ["src/**/*", "build.rs", "Cargo.toml", "README.md", "LICENSE-MIT", "LICENSE-APACHE"]
= true
= true
[]
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# Task 24 (CG-062, CG-064, CG-124): the ORC v2 LLJIT backend's
# hand-written FFI wrapper (`src/orc.rs`) -- see the workspace `Cargo.toml`'s
# own comment on this dependency for why it is safe to add directly
# alongside `inkwell`'s transitive pull of the same crate/version.
= true
# Task 22 (CG-092, CG-117), reconciled against A2-part2 Task 11 at the
# integration merge (docs/LEDGER.md "parallel per-InstanceBody lowering"):
# A2-part2 tried routing this same fan-out through sv-lang's own optional
# `rayon` feature (`Design::par_visit_from`), but that runs the lowering
# closure while still holding sv-lang's borrow of the whole symbol tree, so
# each worker would have to build its `inkwell::context::Context` and hand
# a `Module` born from it back across the `par_visit_from` closure boundary
# -- exactly the `!Send` crossing BINDING CORRECTION 3 forbids. The direct
# `rayon` dependency here instead maps a caller-owned `&[Symbol]` slice
# (collected up front, outside any closure) to a `Vec<Result<LoweredUnit,
# _>>`, where each worker creates its own `Context`, lowers, verifies, and
# serializes to bitcode before the join -- satisfying correction 3. No
# `sv-lang` `rayon` feature is enabled any more; its coverage (N workers ->
# N independently parseable bitcode blobs, and the joined result runs) is
# kept as vj-codegen's own `session.rs` tests.
= true
= true
= true
= true
= { = "../vj-abi", = "0.3.0" }
# Task 28 (CG-157, CG-158, CG-159), docs/CONTRACTS.md D7: `ConstructId`/
# `SourceLoc`/`CoverageSink` are a harness-owned cross-track contract type
# (`vj-harness::coverage`), not something this crate may define a second,
# incompatible local copy of -- codegen is already named as a `CoverageSink`
# consumer in CONTRACTS.md's `vj-harness` table (ledger CG-157) with no
# "not this wave" deferral. No cycle: `vj-harness` depends only on
# `vj-abi`/`vj-sim`/`sv-lang`/`sv-lang-kinds`, none of which depend on
# this crate.
= { = "../vj-harness", = "0.3.0" }
# Task S3c (docs/CONTRACTS.md, `vj-sim::process`'s own doc comment on the
# comparator-duplication tradeoff): codegen consumes the A2-process track's
# Segment IR / FrameLayout shapes (`process::cfg::{Segment,SegTerminator,
# SuspendPoint,SegId}`, `process::liveness::{FrameLayout,FrameSlotDesc,
# FrameSlotSource}`, `process::Effect`) directly -- this crate is
# frontend-only by construction (see module.rs's own doc comment), so it
# takes `vj-sim` with its default (`frontend`-enabled) features, never
# `default-features = false` (that restriction is `vj-runtime`'s own, per
# D4/AB-043).
= { = "../vj-exec", = "0.3.0" }
= { = "../vj-sim", = "0.3.0" }
# Task S6 (CG-045): codegen's `$display`/`$write` lowering builds the exact
# `RtArg` wire shape runtime's format engine consumes and calls the
# already-pinned `sv_rt_display`/`sv_rt_write` symbol names (`rtarg.rs`) --
# consumed directly, never re-derived, per this project's own "duplicate
# pure-function eval diverges" lesson.
= { = "../vj-runtime", = "0.3.0" }
[]
= true