tpu-sg2002 0.1.0

TPU driver in Rust for SG2002 SoC.
Documentation 
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//! IOCTL argument structures matching `cvi_tpu_ioctl.h`.

/// Cache operation argument.
#[repr(C)]
#[derive(Debug, Clone, Copy, Default)]
pub struct CviCacheOpArg {
    pub paddr: u64,
    pub size: u64,
    pub dma_fd: i32,
    pub _padding: i32,
}

/// Submit DMA buffer argument.
#[repr(C)]
#[derive(Debug, Clone, Copy, Default)]
pub struct CviSubmitDmaArg {
    pub fd: i32,
    pub seq_no: u32,
}

/// Wait DMA buffer argument.
#[repr(C)]
#[derive(Debug, Clone, Copy, Default)]
pub struct CviWaitDmaArg {
    pub seq_no: u32,
    pub ret: i32,
}

/// TDMA copy argument for PIO path.
#[repr(C)]
#[derive(Debug, Clone, Copy, Default)]
pub struct CviTdmaCopyArg {
    pub paddr_src: u64,
    pub paddr_dst: u64,
    pub h: u32,
    pub w_bytes: u32,
    pub stride_bytes_src: u32,
    pub stride_bytes_dst: u32,
    pub enable_2d: u32,
    pub leng_bytes: u32,
    pub seq_no: u32,
    pub _padding: u32,
}

/// TDMA wait argument.
#[repr(C)]
#[derive(Debug, Clone, Copy, Default)]
pub struct CviTdmaWaitArg {
    pub seq_no: u32,
    pub ret: i32,
}

/// IOCTL command numbers.
pub const IOCTL_TPU_BASE: u8 = b'p';
pub const CVITPU_SUBMIT_DMABUF: u8 = 0x01;
pub const CVITPU_DMABUF_FLUSH: u8 = 0x04;
pub const CVITPU_DMABUF_INVLD: u8 = 0x05;
pub const CVITPU_WAIT_DMABUF: u8 = 0x06;
pub const CVITPU_SUBMIT_PIO: u8 = 0x0B;
pub const CVITPU_WAIT_PIO: u8 = 0x0C;