svd-generator 0.4.4

Converts device information from flattened device tree into an SVD description
Documentation 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87

use crate::svd::register::{
    create_bit_range, create_cluster, create_field, create_register, create_register_properties,
};
use crate::Result;

/// Creates ARM PL080 DMA Controller Test registers.
pub fn create() -> Result<svd::RegisterCluster> {
    Ok(svd::RegisterCluster::Cluster(create_cluster(
        "test",
        "DMAC Test registers - controls and reads registers used in peripheral integration tests.",
        0x500,
        &[
            svd::RegisterCluster::Register(create_register(
                "itcr",
                "DMA Test Control register - enables you to test the DMAC using TIC block-level tests and Built-In Self-Test (BIST) integration and system level tests.",
                0x0,
                create_register_properties(32, 0)?,
                Some(&[
                    create_field(
                        "test",
                        "Test mode enable - 0: normal operation, 1: test registers multiplexed onto inputs and outputs. Multiplex the test registers to control the input and output lines.",
                        create_bit_range("[0:0]")?,
                        svd::Access::ReadWrite,
                        None,
                    )?,
                ]),
                None,
            )?),
            svd::RegisterCluster::Register(create_register(
                "itop1",
                "DMA Integration Test Output 1 register - controls and reads the DMACCLR[15:0] output lines in test mode.",
                0x4,
                create_register_properties(32, 0)?,
                Some(&[
                    create_field(
                        "clr",
                        "Controls and reads the DMACCLR[15:0] output lines in test mode.",
                        create_bit_range("[15:0]")?,
                        svd::Access::ReadWrite,
                        None,
                    )?,
                ]),
                None,
            )?),
            svd::RegisterCluster::Register(create_register(
                "itop2",
                "DMA Integration Test Output 2 register - controls and reads the DMACTC[15:0] output lines in test mode.",
                0x8,
                create_register_properties(32, 0)?,
                Some(&[
                    create_field(
                        "tc",
                        "Controls and reads the DMACTC[15:0] output lines in test mode.",
                        create_bit_range("[15:0]")?,
                        svd::Access::ReadWrite,
                        None,
                    )?,
                ]),
                None,
            )?),
            svd::RegisterCluster::Register(create_register(
                "itop3",
                "DMA Integration Test Output 3 register - controls and reads the interrupt request output lines in test mode. The DMACINTR interrupt request signal combines both interrupt requests, DMACINTTC and DMACINTERR, into one interrupt request signal. Therefore, if you set either the TC or E bits, then DMACINTR is active.",
                0xc,
                create_register_properties(32, 0)?,
                Some(&[
                    create_field(
                        "tc",
                        "You can set the DMACINTTC interrupt request to a certain value in test mode by writing to the register. A read returns the value on the output, after the test multiplexor.",
                        create_bit_range("[0:0]")?,
                        svd::Access::ReadWrite,
                        None,
                    )?,
                    create_field(
                        "err",
                        "You can set the DMACINTERR interrupt request to a certain value in test mode by writing to the register. A read returns the value on the output, after the test multiplexor.",
                        create_bit_range("[1:1]")?,
                        svd::Access::ReadWrite,
                        None,
                    )?,
                ]),
                None,
            )?),
        ],
        None,
    )?))
}