use crate::svd::register::{
create_bit_range, create_field, create_register, create_register_properties,
};
use crate::Result;
pub fn create() -> Result<svd::RegisterCluster> {
Ok(svd::RegisterCluster::Register(create_register(
"configuration",
"DMA Configuration register - configures the operation of the DMAC. You can alter the endianness of the individual AHB master interfaces by writing to the M1 and M2 bits of this register. The M1 bit enables you to alter the endianness of AHB master interface 1. The M2 bit enables you to alter the endianness of AHB master interface 2. The AHB master interfaces are set to little-endian mode on reset.",
0x30,
create_register_properties(32, 0)?,
Some(&[
create_field(
"e",
"DMAC enable - 0: Diable, 1: Enable. This bit is reset to 0. Disabling the DMAC reduces power consumption.",
create_bit_range("[0:0]")?,
svd::Access::ReadWrite,
None,
)?,
create_field(
"m",
"DMAC AHB Master - 0: little-endian mode, 1: big-endian mode. This bit is reset to 0.",
create_bit_range("[1:1]")?,
svd::Access::ReadWrite,
Some(svd::DimElement::builder()
.dim(2)
.dim_increment(0x1)
.dim_index(Some([
String::from("1"),
String::from("2"),
].into()))
.build(svd::ValidateLevel::Strict)?),
)?,
]),
None,
)?))
}