#![no_main]
#![no_std]
use core::{mem, mem::MaybeUninit};
use log::info;
use cortex_m_rt::entry;
use stm32h7xx_hal::dma::{
config::BurstMode,
dma::{DmaConfig, StreamsTuple},
Transfer,
};
use stm32h7xx_hal::{adc, delay::Delay, pac, prelude::*};
#[macro_use]
mod utilities;
#[entry]
fn main() -> ! {
utilities::logger::init();
let cp = cortex_m::Peripherals::take().unwrap();
let dp = pac::Peripherals::take().unwrap();
#[link_section = ".axisram"]
static mut BUFFER: MaybeUninit<[u16; 32_768]> = MaybeUninit::uninit();
let adc_buffer: &'static mut [u16; 32_768] = {
let buf: &mut [MaybeUninit<u16>; 32_768] =
unsafe { mem::transmute(&mut BUFFER) };
for slot in buf.iter_mut() {
unsafe {
slot.as_mut_ptr().write(0);
}
}
unsafe { mem::transmute(buf) }
};
info!("Setup PWR... ");
let pwr = dp.PWR.constrain();
let pwrcfg = example_power!(pwr).freeze();
info!("Setup RCC... ");
let rcc = dp.RCC.constrain();
let ccdr = rcc
.sys_ck(400.MHz())
.pll2_p_ck(40.MHz())
.freeze(pwrcfg, &dp.SYSCFG);
info!("");
info!("stm32h7xx-hal example - ADC to Memory DMA");
info!("");
let mut delay = Delay::new(cp.SYST, ccdr.clocks);
let mut adc1 = adc::Adc::adc1(
dp.ADC1,
2.MHz(),
&mut delay,
ccdr.peripheral.ADC12,
&ccdr.clocks,
)
.enable();
adc1.set_resolution(adc::Resolution::SixteenBit);
let gpioc = dp.GPIOC.split(ccdr.peripheral.GPIOC);
let mut channel = gpioc.pc0.into_analog();
let config = DmaConfig::default()
.memory_increment(true)
.peripheral_burst(BurstMode::Burst4);
let streams = StreamsTuple::new(dp.DMA1, ccdr.peripheral.DMA1);
let mut transfer: Transfer<_, _, _, _, _> =
Transfer::init(streams.0, adc1, &mut adc_buffer[..], None, config);
transfer.start(|adc| {
adc.start_conversion_dma(&mut channel, adc::AdcDmaMode::OneShot);
});
while !transfer.get_transfer_complete_flag() {}
loop {
cortex_m::asm::nop()
}
}