stm32h7 0.16.0

Device support crates for STM32H7 devices
Documentation 
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///Register `OPAMP1_HSOTR` reader
pub type R = crate::R<OPAMP1_HSOTRrs>;
///Register `OPAMP1_HSOTR` writer
pub type W = crate::W<OPAMP1_HSOTRrs>;
///Field `TRIMLPOFFSETN` reader - Trim for NMOS differential pairs
pub type TRIMLPOFFSETN_R = crate::FieldReader;
///Field `TRIMLPOFFSETN` writer - Trim for NMOS differential pairs
pub type TRIMLPOFFSETN_W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
///Field `TRIMLPOFFSETP` reader - Trim for PMOS differential pairs
pub type TRIMLPOFFSETP_R = crate::FieldReader;
///Field `TRIMLPOFFSETP` writer - Trim for PMOS differential pairs
pub type TRIMLPOFFSETP_W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
impl R {
    ///Bits 0:4 - Trim for NMOS differential pairs
    #[inline(always)]
    pub fn trimlpoffsetn(&self) -> TRIMLPOFFSETN_R {
        TRIMLPOFFSETN_R::new((self.bits & 0x1f) as u8)
    }
    ///Bits 8:12 - Trim for PMOS differential pairs
    #[inline(always)]
    pub fn trimlpoffsetp(&self) -> TRIMLPOFFSETP_R {
        TRIMLPOFFSETP_R::new(((self.bits >> 8) & 0x1f) as u8)
    }
}
impl core::fmt::Debug for R {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("OPAMP1_HSOTR")
            .field("trimlpoffsetn", &self.trimlpoffsetn())
            .field("trimlpoffsetp", &self.trimlpoffsetp())
            .finish()
    }
}
impl W {
    ///Bits 0:4 - Trim for NMOS differential pairs
    #[inline(always)]
    pub fn trimlpoffsetn(&mut self) -> TRIMLPOFFSETN_W<OPAMP1_HSOTRrs> {
        TRIMLPOFFSETN_W::new(self, 0)
    }
    ///Bits 8:12 - Trim for PMOS differential pairs
    #[inline(always)]
    pub fn trimlpoffsetp(&mut self) -> TRIMLPOFFSETP_W<OPAMP1_HSOTRrs> {
        TRIMLPOFFSETP_W::new(self, 8)
    }
}
/**OPAMP1 offset trimming register in low-power mode

You can [`read`](crate::Reg::read) this register and get [`opamp1_hsotr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`opamp1_hsotr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).*/
pub struct OPAMP1_HSOTRrs;
impl crate::RegisterSpec for OPAMP1_HSOTRrs {
    type Ux = u32;
}
///`read()` method returns [`opamp1_hsotr::R`](R) reader structure
impl crate::Readable for OPAMP1_HSOTRrs {}
///`write(|w| ..)` method takes [`opamp1_hsotr::W`](W) writer structure
impl crate::Writable for OPAMP1_HSOTRrs {
    type Safety = crate::Unsafe;
}
///`reset()` method sets OPAMP1_HSOTR to value 0
impl crate::Resettable for OPAMP1_HSOTRrs {}