stm32h7 0.16.0

Device support crates for STM32H7 devices
Documentation 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27

///Register `DINR0` reader
pub type R = crate::R<DINR0rs>;
///Field `DIN` reader - input data received from MDIO master during write frames This field is written by hardware with the 16-bit data received in a write frame which is addressed to MDIOS register x.
pub type DIN_R = crate::FieldReader<u16>;
impl R {
    ///Bits 0:15 - input data received from MDIO master during write frames This field is written by hardware with the 16-bit data received in a write frame which is addressed to MDIOS register x.
    #[inline(always)]
    pub fn din(&self) -> DIN_R {
        DIN_R::new((self.bits & 0xffff) as u16)
    }
}
impl core::fmt::Debug for R {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("DINR0").field("din", &self.din()).finish()
    }
}
/**MDIOS input data register 0

You can [`read`](crate::Reg::read) this register and get [`dinr0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).*/
pub struct DINR0rs;
impl crate::RegisterSpec for DINR0rs {
    type Ux = u32;
}
///`read()` method returns [`dinr0::R`](R) reader structure
impl crate::Readable for DINR0rs {}
///`reset()` method sets DINR0 to value 0
impl crate::Resettable for DINR0rs {}