#[doc = "Register `OTG_HS_DOEPCTL7` reader"]
pub struct R(crate::R<OTG_HS_DOEPCTL7_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<OTG_HS_DOEPCTL7_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<OTG_HS_DOEPCTL7_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<OTG_HS_DOEPCTL7_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `OTG_HS_DOEPCTL7` writer"]
pub struct W(crate::W<OTG_HS_DOEPCTL7_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<OTG_HS_DOEPCTL7_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<OTG_HS_DOEPCTL7_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<OTG_HS_DOEPCTL7_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `MPSIZ` reader - Maximum packet size"]
pub struct MPSIZ_R(crate::FieldReader<u16, u16>);
impl MPSIZ_R {
pub(crate) fn new(bits: u16) -> Self {
MPSIZ_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for MPSIZ_R {
type Target = crate::FieldReader<u16, u16>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `MPSIZ` writer - Maximum packet size"]
pub struct MPSIZ_W<'a> {
w: &'a mut W,
}
impl<'a> MPSIZ_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u16) -> &'a mut W {
self.w.bits = (self.w.bits & !0x07ff) | (value as u32 & 0x07ff);
self.w
}
}
#[doc = "Field `USBAEP` reader - USB active endpoint"]
pub struct USBAEP_R(crate::FieldReader<bool, bool>);
impl USBAEP_R {
pub(crate) fn new(bits: bool) -> Self {
USBAEP_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for USBAEP_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `USBAEP` writer - USB active endpoint"]
pub struct USBAEP_W<'a> {
w: &'a mut W,
}
impl<'a> USBAEP_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15);
self.w
}
}
#[doc = "Field `EONUM_DPID` reader - Even odd frame/Endpoint data PID"]
pub struct EONUM_DPID_R(crate::FieldReader<bool, bool>);
impl EONUM_DPID_R {
pub(crate) fn new(bits: bool) -> Self {
EONUM_DPID_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for EONUM_DPID_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `NAKSTS` reader - NAK status"]
pub struct NAKSTS_R(crate::FieldReader<bool, bool>);
impl NAKSTS_R {
pub(crate) fn new(bits: bool) -> Self {
NAKSTS_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for NAKSTS_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `EPTYP` reader - Endpoint type"]
pub struct EPTYP_R(crate::FieldReader<u8, u8>);
impl EPTYP_R {
pub(crate) fn new(bits: u8) -> Self {
EPTYP_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for EPTYP_R {
type Target = crate::FieldReader<u8, u8>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `EPTYP` writer - Endpoint type"]
pub struct EPTYP_W<'a> {
w: &'a mut W,
}
impl<'a> EPTYP_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18);
self.w
}
}
#[doc = "Field `SNPM` reader - Snoop mode"]
pub struct SNPM_R(crate::FieldReader<bool, bool>);
impl SNPM_R {
pub(crate) fn new(bits: bool) -> Self {
SNPM_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for SNPM_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `SNPM` writer - Snoop mode"]
pub struct SNPM_W<'a> {
w: &'a mut W,
}
impl<'a> SNPM_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20);
self.w
}
}
#[doc = "Field `Stall` reader - STALL handshake"]
pub struct STALL_R(crate::FieldReader<bool, bool>);
impl STALL_R {
pub(crate) fn new(bits: bool) -> Self {
STALL_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for STALL_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `Stall` writer - STALL handshake"]
pub struct STALL_W<'a> {
w: &'a mut W,
}
impl<'a> STALL_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21);
self.w
}
}
#[doc = "Field `CNAK` writer - Clear NAK"]
pub struct CNAK_W<'a> {
w: &'a mut W,
}
impl<'a> CNAK_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26);
self.w
}
}
#[doc = "Field `SNAK` writer - Set NAK"]
pub struct SNAK_W<'a> {
w: &'a mut W,
}
impl<'a> SNAK_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27);
self.w
}
}
#[doc = "Field `SD0PID_SEVNFRM` writer - Set DATA0 PID/Set even frame"]
pub struct SD0PID_SEVNFRM_W<'a> {
w: &'a mut W,
}
impl<'a> SD0PID_SEVNFRM_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28);
self.w
}
}
#[doc = "Field `SODDFRM` writer - Set odd frame"]
pub struct SODDFRM_W<'a> {
w: &'a mut W,
}
impl<'a> SODDFRM_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29);
self.w
}
}
#[doc = "Field `EPDIS` reader - Endpoint disable"]
pub struct EPDIS_R(crate::FieldReader<bool, bool>);
impl EPDIS_R {
pub(crate) fn new(bits: bool) -> Self {
EPDIS_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for EPDIS_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `EPDIS` writer - Endpoint disable"]
pub struct EPDIS_W<'a> {
w: &'a mut W,
}
impl<'a> EPDIS_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30);
self.w
}
}
#[doc = "Field `EPENA` reader - Endpoint enable"]
pub struct EPENA_R(crate::FieldReader<bool, bool>);
impl EPENA_R {
pub(crate) fn new(bits: bool) -> Self {
EPENA_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for EPENA_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `EPENA` writer - Endpoint enable"]
pub struct EPENA_W<'a> {
w: &'a mut W,
}
impl<'a> EPENA_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31);
self.w
}
}
impl R {
#[doc = "Bits 0:10 - Maximum packet size"]
#[inline(always)]
pub fn mpsiz(&self) -> MPSIZ_R {
MPSIZ_R::new((self.bits & 0x07ff) as u16)
}
#[doc = "Bit 15 - USB active endpoint"]
#[inline(always)]
pub fn usbaep(&self) -> USBAEP_R {
USBAEP_R::new(((self.bits >> 15) & 0x01) != 0)
}
#[doc = "Bit 16 - Even odd frame/Endpoint data PID"]
#[inline(always)]
pub fn eonum_dpid(&self) -> EONUM_DPID_R {
EONUM_DPID_R::new(((self.bits >> 16) & 0x01) != 0)
}
#[doc = "Bit 17 - NAK status"]
#[inline(always)]
pub fn naksts(&self) -> NAKSTS_R {
NAKSTS_R::new(((self.bits >> 17) & 0x01) != 0)
}
#[doc = "Bits 18:19 - Endpoint type"]
#[inline(always)]
pub fn eptyp(&self) -> EPTYP_R {
EPTYP_R::new(((self.bits >> 18) & 0x03) as u8)
}
#[doc = "Bit 20 - Snoop mode"]
#[inline(always)]
pub fn snpm(&self) -> SNPM_R {
SNPM_R::new(((self.bits >> 20) & 0x01) != 0)
}
#[doc = "Bit 21 - STALL handshake"]
#[inline(always)]
pub fn stall(&self) -> STALL_R {
STALL_R::new(((self.bits >> 21) & 0x01) != 0)
}
#[doc = "Bit 30 - Endpoint disable"]
#[inline(always)]
pub fn epdis(&self) -> EPDIS_R {
EPDIS_R::new(((self.bits >> 30) & 0x01) != 0)
}
#[doc = "Bit 31 - Endpoint enable"]
#[inline(always)]
pub fn epena(&self) -> EPENA_R {
EPENA_R::new(((self.bits >> 31) & 0x01) != 0)
}
}
impl W {
#[doc = "Bits 0:10 - Maximum packet size"]
#[inline(always)]
pub fn mpsiz(&mut self) -> MPSIZ_W {
MPSIZ_W { w: self }
}
#[doc = "Bit 15 - USB active endpoint"]
#[inline(always)]
pub fn usbaep(&mut self) -> USBAEP_W {
USBAEP_W { w: self }
}
#[doc = "Bits 18:19 - Endpoint type"]
#[inline(always)]
pub fn eptyp(&mut self) -> EPTYP_W {
EPTYP_W { w: self }
}
#[doc = "Bit 20 - Snoop mode"]
#[inline(always)]
pub fn snpm(&mut self) -> SNPM_W {
SNPM_W { w: self }
}
#[doc = "Bit 21 - STALL handshake"]
#[inline(always)]
pub fn stall(&mut self) -> STALL_W {
STALL_W { w: self }
}
#[doc = "Bit 26 - Clear NAK"]
#[inline(always)]
pub fn cnak(&mut self) -> CNAK_W {
CNAK_W { w: self }
}
#[doc = "Bit 27 - Set NAK"]
#[inline(always)]
pub fn snak(&mut self) -> SNAK_W {
SNAK_W { w: self }
}
#[doc = "Bit 28 - Set DATA0 PID/Set even frame"]
#[inline(always)]
pub fn sd0pid_sevnfrm(&mut self) -> SD0PID_SEVNFRM_W {
SD0PID_SEVNFRM_W { w: self }
}
#[doc = "Bit 29 - Set odd frame"]
#[inline(always)]
pub fn soddfrm(&mut self) -> SODDFRM_W {
SODDFRM_W { w: self }
}
#[doc = "Bit 30 - Endpoint disable"]
#[inline(always)]
pub fn epdis(&mut self) -> EPDIS_W {
EPDIS_W { w: self }
}
#[doc = "Bit 31 - Endpoint enable"]
#[inline(always)]
pub fn epena(&mut self) -> EPENA_W {
EPENA_W { w: self }
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "OTG device endpoint-7 control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [otg_hs_doepctl7](index.html) module"]
pub struct OTG_HS_DOEPCTL7_SPEC;
impl crate::RegisterSpec for OTG_HS_DOEPCTL7_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [otg_hs_doepctl7::R](R) reader structure"]
impl crate::Readable for OTG_HS_DOEPCTL7_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [otg_hs_doepctl7::W](W) writer structure"]
impl crate::Writable for OTG_HS_DOEPCTL7_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets OTG_HS_DOEPCTL7 to value 0"]
impl crate::Resettable for OTG_HS_DOEPCTL7_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}