#[doc = "Reader of register APB1ENR"]
pub type R = crate::R<u32, super::APB1ENR>;
#[doc = "Writer for register APB1ENR"]
pub type W = crate::W<u32, super::APB1ENR>;
#[doc = "Register APB1ENR `reset()`'s with value 0"]
impl crate::ResetValue for super::APB1ENR {
type Type = u32;
#[inline(always)]
fn reset_value() -> Self::Type {
0
}
}
#[doc = "Timer 2 clock enable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TIM2EN_A {
#[doc = "0: The selected clock is disabled"]
DISABLED = 0,
#[doc = "1: The selected clock is enabled"]
ENABLED = 1,
}
impl From<TIM2EN_A> for bool {
#[inline(always)]
fn from(variant: TIM2EN_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `TIM2EN`"]
pub type TIM2EN_R = crate::R<bool, TIM2EN_A>;
impl TIM2EN_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> TIM2EN_A {
match self.bits {
false => TIM2EN_A::DISABLED,
true => TIM2EN_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == TIM2EN_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == TIM2EN_A::ENABLED
}
}
#[doc = "Write proxy for field `TIM2EN`"]
pub struct TIM2EN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM2EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM2EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
self.w
}
}
#[doc = "Timer 3 clock enable"]
pub type TIM3EN_A = TIM2EN_A;
#[doc = "Reader of field `TIM3EN`"]
pub type TIM3EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `TIM3EN`"]
pub struct TIM3EN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM3EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM3EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
self.w
}
}
#[doc = "Timer 4 clock enable"]
pub type TIM4EN_A = TIM2EN_A;
#[doc = "Reader of field `TIM4EN`"]
pub type TIM4EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `TIM4EN`"]
pub struct TIM4EN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM4EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM4EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
self.w
}
}
#[doc = "Timer 6 clock enable"]
pub type TIM6EN_A = TIM2EN_A;
#[doc = "Reader of field `TIM6EN`"]
pub type TIM6EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `TIM6EN`"]
pub struct TIM6EN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM6EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM6EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
self.w
}
}
#[doc = "Timer 7 clock enable"]
pub type TIM7EN_A = TIM2EN_A;
#[doc = "Reader of field `TIM7EN`"]
pub type TIM7EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `TIM7EN`"]
pub struct TIM7EN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM7EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM7EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
self.w
}
}
#[doc = "Window watchdog clock enable"]
pub type WWDGEN_A = TIM2EN_A;
#[doc = "Reader of field `WWDGEN`"]
pub type WWDGEN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `WWDGEN`"]
pub struct WWDGEN_W<'a> {
w: &'a mut W,
}
impl<'a> WWDGEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: WWDGEN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11);
self.w
}
}
#[doc = "SPI 2 clock enable"]
pub type SPI2EN_A = TIM2EN_A;
#[doc = "Reader of field `SPI2EN`"]
pub type SPI2EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `SPI2EN`"]
pub struct SPI2EN_W<'a> {
w: &'a mut W,
}
impl<'a> SPI2EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SPI2EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14);
self.w
}
}
#[doc = "SPI 3 clock enable"]
pub type SPI3EN_A = TIM2EN_A;
#[doc = "Reader of field `SPI3EN`"]
pub type SPI3EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `SPI3EN`"]
pub struct SPI3EN_W<'a> {
w: &'a mut W,
}
impl<'a> SPI3EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SPI3EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15);
self.w
}
}
#[doc = "USART 2 clock enable"]
pub type USART2EN_A = TIM2EN_A;
#[doc = "Reader of field `USART2EN`"]
pub type USART2EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `USART2EN`"]
pub struct USART2EN_W<'a> {
w: &'a mut W,
}
impl<'a> USART2EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: USART2EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17);
self.w
}
}
#[doc = "USART 3 clock enable"]
pub type USART3EN_A = TIM2EN_A;
#[doc = "Reader of field `USART3EN`"]
pub type USART3EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `USART3EN`"]
pub struct USART3EN_W<'a> {
w: &'a mut W,
}
impl<'a> USART3EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: USART3EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18);
self.w
}
}
#[doc = "I2C 1 clock enable"]
pub type I2C1EN_A = TIM2EN_A;
#[doc = "Reader of field `I2C1EN`"]
pub type I2C1EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `I2C1EN`"]
pub struct I2C1EN_W<'a> {
w: &'a mut W,
}
impl<'a> I2C1EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: I2C1EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21);
self.w
}
}
#[doc = "I2C 2 clock enable"]
pub type I2C2EN_A = TIM2EN_A;
#[doc = "Reader of field `I2C2EN`"]
pub type I2C2EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `I2C2EN`"]
pub struct I2C2EN_W<'a> {
w: &'a mut W,
}
impl<'a> I2C2EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: I2C2EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22);
self.w
}
}
#[doc = "USB clock enable"]
pub type USBEN_A = TIM2EN_A;
#[doc = "Reader of field `USBEN`"]
pub type USBEN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `USBEN`"]
pub struct USBEN_W<'a> {
w: &'a mut W,
}
impl<'a> USBEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: USBEN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23);
self.w
}
}
#[doc = "CAN clock enable"]
pub type CANEN_A = TIM2EN_A;
#[doc = "Reader of field `CANEN`"]
pub type CANEN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `CANEN`"]
pub struct CANEN_W<'a> {
w: &'a mut W,
}
impl<'a> CANEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: CANEN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25);
self.w
}
}
#[doc = "DAC3 interface clock enable"]
pub type DAC2EN_A = TIM2EN_A;
#[doc = "Reader of field `DAC2EN`"]
pub type DAC2EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `DAC2EN`"]
pub struct DAC2EN_W<'a> {
w: &'a mut W,
}
impl<'a> DAC2EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: DAC2EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26);
self.w
}
}
#[doc = "Power interface clock enable"]
pub type PWREN_A = TIM2EN_A;
#[doc = "Reader of field `PWREN`"]
pub type PWREN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `PWREN`"]
pub struct PWREN_W<'a> {
w: &'a mut W,
}
impl<'a> PWREN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: PWREN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28);
self.w
}
}
#[doc = "DAC interface clock enable"]
pub type DAC1EN_A = TIM2EN_A;
#[doc = "Reader of field `DAC1EN`"]
pub type DAC1EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `DAC1EN`"]
pub struct DAC1EN_W<'a> {
w: &'a mut W,
}
impl<'a> DAC1EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: DAC1EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29);
self.w
}
}
#[doc = "UART4 clock enable"]
pub type UART4EN_A = TIM2EN_A;
#[doc = "Reader of field `UART4EN`"]
pub type UART4EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `UART4EN`"]
pub struct UART4EN_W<'a> {
w: &'a mut W,
}
impl<'a> UART4EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: UART4EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19);
self.w
}
}
#[doc = "UART5 clock enable"]
pub type UART5EN_A = TIM2EN_A;
#[doc = "Reader of field `UART5EN`"]
pub type UART5EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `UART5EN`"]
pub struct UART5EN_W<'a> {
w: &'a mut W,
}
impl<'a> UART5EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: UART5EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20);
self.w
}
}
#[doc = "I2C3 clock enable"]
pub type I2C3EN_A = TIM2EN_A;
#[doc = "Reader of field `I2C3EN`"]
pub type I2C3EN_R = crate::R<bool, TIM2EN_A>;
#[doc = "Write proxy for field `I2C3EN`"]
pub struct I2C3EN_W<'a> {
w: &'a mut W,
}
impl<'a> I2C3EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: I2C3EN_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30);
self.w
}
}
impl R {
#[doc = "Bit 0 - Timer 2 clock enable"]
#[inline(always)]
pub fn tim2en(&self) -> TIM2EN_R {
TIM2EN_R::new((self.bits & 0x01) != 0)
}
#[doc = "Bit 1 - Timer 3 clock enable"]
#[inline(always)]
pub fn tim3en(&self) -> TIM3EN_R {
TIM3EN_R::new(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 2 - Timer 4 clock enable"]
#[inline(always)]
pub fn tim4en(&self) -> TIM4EN_R {
TIM4EN_R::new(((self.bits >> 2) & 0x01) != 0)
}
#[doc = "Bit 4 - Timer 6 clock enable"]
#[inline(always)]
pub fn tim6en(&self) -> TIM6EN_R {
TIM6EN_R::new(((self.bits >> 4) & 0x01) != 0)
}
#[doc = "Bit 5 - Timer 7 clock enable"]
#[inline(always)]
pub fn tim7en(&self) -> TIM7EN_R {
TIM7EN_R::new(((self.bits >> 5) & 0x01) != 0)
}
#[doc = "Bit 11 - Window watchdog clock enable"]
#[inline(always)]
pub fn wwdgen(&self) -> WWDGEN_R {
WWDGEN_R::new(((self.bits >> 11) & 0x01) != 0)
}
#[doc = "Bit 14 - SPI 2 clock enable"]
#[inline(always)]
pub fn spi2en(&self) -> SPI2EN_R {
SPI2EN_R::new(((self.bits >> 14) & 0x01) != 0)
}
#[doc = "Bit 15 - SPI 3 clock enable"]
#[inline(always)]
pub fn spi3en(&self) -> SPI3EN_R {
SPI3EN_R::new(((self.bits >> 15) & 0x01) != 0)
}
#[doc = "Bit 17 - USART 2 clock enable"]
#[inline(always)]
pub fn usart2en(&self) -> USART2EN_R {
USART2EN_R::new(((self.bits >> 17) & 0x01) != 0)
}
#[doc = "Bit 18 - USART 3 clock enable"]
#[inline(always)]
pub fn usart3en(&self) -> USART3EN_R {
USART3EN_R::new(((self.bits >> 18) & 0x01) != 0)
}
#[doc = "Bit 21 - I2C 1 clock enable"]
#[inline(always)]
pub fn i2c1en(&self) -> I2C1EN_R {
I2C1EN_R::new(((self.bits >> 21) & 0x01) != 0)
}
#[doc = "Bit 22 - I2C 2 clock enable"]
#[inline(always)]
pub fn i2c2en(&self) -> I2C2EN_R {
I2C2EN_R::new(((self.bits >> 22) & 0x01) != 0)
}
#[doc = "Bit 23 - USB clock enable"]
#[inline(always)]
pub fn usben(&self) -> USBEN_R {
USBEN_R::new(((self.bits >> 23) & 0x01) != 0)
}
#[doc = "Bit 25 - CAN clock enable"]
#[inline(always)]
pub fn canen(&self) -> CANEN_R {
CANEN_R::new(((self.bits >> 25) & 0x01) != 0)
}
#[doc = "Bit 26 - DAC3 interface clock enable"]
#[inline(always)]
pub fn dac2en(&self) -> DAC2EN_R {
DAC2EN_R::new(((self.bits >> 26) & 0x01) != 0)
}
#[doc = "Bit 28 - Power interface clock enable"]
#[inline(always)]
pub fn pwren(&self) -> PWREN_R {
PWREN_R::new(((self.bits >> 28) & 0x01) != 0)
}
#[doc = "Bit 29 - DAC interface clock enable"]
#[inline(always)]
pub fn dac1en(&self) -> DAC1EN_R {
DAC1EN_R::new(((self.bits >> 29) & 0x01) != 0)
}
#[doc = "Bit 19 - UART4 clock enable"]
#[inline(always)]
pub fn uart4en(&self) -> UART4EN_R {
UART4EN_R::new(((self.bits >> 19) & 0x01) != 0)
}
#[doc = "Bit 20 - UART5 clock enable"]
#[inline(always)]
pub fn uart5en(&self) -> UART5EN_R {
UART5EN_R::new(((self.bits >> 20) & 0x01) != 0)
}
#[doc = "Bit 30 - I2C3 clock enable"]
#[inline(always)]
pub fn i2c3en(&self) -> I2C3EN_R {
I2C3EN_R::new(((self.bits >> 30) & 0x01) != 0)
}
}
impl W {
#[doc = "Bit 0 - Timer 2 clock enable"]
#[inline(always)]
pub fn tim2en(&mut self) -> TIM2EN_W {
TIM2EN_W { w: self }
}
#[doc = "Bit 1 - Timer 3 clock enable"]
#[inline(always)]
pub fn tim3en(&mut self) -> TIM3EN_W {
TIM3EN_W { w: self }
}
#[doc = "Bit 2 - Timer 4 clock enable"]
#[inline(always)]
pub fn tim4en(&mut self) -> TIM4EN_W {
TIM4EN_W { w: self }
}
#[doc = "Bit 4 - Timer 6 clock enable"]
#[inline(always)]
pub fn tim6en(&mut self) -> TIM6EN_W {
TIM6EN_W { w: self }
}
#[doc = "Bit 5 - Timer 7 clock enable"]
#[inline(always)]
pub fn tim7en(&mut self) -> TIM7EN_W {
TIM7EN_W { w: self }
}
#[doc = "Bit 11 - Window watchdog clock enable"]
#[inline(always)]
pub fn wwdgen(&mut self) -> WWDGEN_W {
WWDGEN_W { w: self }
}
#[doc = "Bit 14 - SPI 2 clock enable"]
#[inline(always)]
pub fn spi2en(&mut self) -> SPI2EN_W {
SPI2EN_W { w: self }
}
#[doc = "Bit 15 - SPI 3 clock enable"]
#[inline(always)]
pub fn spi3en(&mut self) -> SPI3EN_W {
SPI3EN_W { w: self }
}
#[doc = "Bit 17 - USART 2 clock enable"]
#[inline(always)]
pub fn usart2en(&mut self) -> USART2EN_W {
USART2EN_W { w: self }
}
#[doc = "Bit 18 - USART 3 clock enable"]
#[inline(always)]
pub fn usart3en(&mut self) -> USART3EN_W {
USART3EN_W { w: self }
}
#[doc = "Bit 21 - I2C 1 clock enable"]
#[inline(always)]
pub fn i2c1en(&mut self) -> I2C1EN_W {
I2C1EN_W { w: self }
}
#[doc = "Bit 22 - I2C 2 clock enable"]
#[inline(always)]
pub fn i2c2en(&mut self) -> I2C2EN_W {
I2C2EN_W { w: self }
}
#[doc = "Bit 23 - USB clock enable"]
#[inline(always)]
pub fn usben(&mut self) -> USBEN_W {
USBEN_W { w: self }
}
#[doc = "Bit 25 - CAN clock enable"]
#[inline(always)]
pub fn canen(&mut self) -> CANEN_W {
CANEN_W { w: self }
}
#[doc = "Bit 26 - DAC3 interface clock enable"]
#[inline(always)]
pub fn dac2en(&mut self) -> DAC2EN_W {
DAC2EN_W { w: self }
}
#[doc = "Bit 28 - Power interface clock enable"]
#[inline(always)]
pub fn pwren(&mut self) -> PWREN_W {
PWREN_W { w: self }
}
#[doc = "Bit 29 - DAC interface clock enable"]
#[inline(always)]
pub fn dac1en(&mut self) -> DAC1EN_W {
DAC1EN_W { w: self }
}
#[doc = "Bit 19 - UART4 clock enable"]
#[inline(always)]
pub fn uart4en(&mut self) -> UART4EN_W {
UART4EN_W { w: self }
}
#[doc = "Bit 20 - UART5 clock enable"]
#[inline(always)]
pub fn uart5en(&mut self) -> UART5EN_W {
UART5EN_W { w: self }
}
#[doc = "Bit 30 - I2C3 clock enable"]
#[inline(always)]
pub fn i2c3en(&mut self) -> I2C3EN_W {
I2C3EN_W { w: self }
}
}