#[doc = "Reader of register APB2RSTR"]
pub type R = crate::R<u32, super::APB2RSTR>;
#[doc = "Writer for register APB2RSTR"]
pub type W = crate::W<u32, super::APB2RSTR>;
#[doc = "Register APB2RSTR `reset()`'s with value 0"]
impl crate::ResetValue for super::APB2RSTR {
type Type = u32;
#[inline(always)]
fn reset_value() -> Self::Type {
0
}
}
#[doc = "SYSCFG and COMP reset\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum SYSCFGRST_A {
#[doc = "1: Reset the selected module"]
RESET = 1,
}
impl From<SYSCFGRST_A> for bool {
#[inline(always)]
fn from(variant: SYSCFGRST_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `SYSCFGRST`"]
pub type SYSCFGRST_R = crate::R<bool, SYSCFGRST_A>;
impl SYSCFGRST_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> crate::Variant<bool, SYSCFGRST_A> {
use crate::Variant::*;
match self.bits {
true => Val(SYSCFGRST_A::RESET),
i => Res(i),
}
}
#[doc = "Checks if the value of the field is `RESET`"]
#[inline(always)]
pub fn is_reset(&self) -> bool {
*self == SYSCFGRST_A::RESET
}
}
#[doc = "Write proxy for field `SYSCFGRST`"]
pub struct SYSCFGRST_W<'a> {
w: &'a mut W,
}
impl<'a> SYSCFGRST_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SYSCFGRST_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(SYSCFGRST_A::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
self.w
}
}
#[doc = "ADC interface reset"]
pub type ADCRST_A = SYSCFGRST_A;
#[doc = "Reader of field `ADCRST`"]
pub type ADCRST_R = crate::R<bool, SYSCFGRST_A>;
#[doc = "Write proxy for field `ADCRST`"]
pub struct ADCRST_W<'a> {
w: &'a mut W,
}
impl<'a> ADCRST_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ADCRST_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(SYSCFGRST_A::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
self.w
}
}
#[doc = "SPI 1 reset"]
pub type SPI1RST_A = SYSCFGRST_A;
#[doc = "Reader of field `SPI1RST`"]
pub type SPI1RST_R = crate::R<bool, SYSCFGRST_A>;
#[doc = "Write proxy for field `SPI1RST`"]
pub struct SPI1RST_W<'a> {
w: &'a mut W,
}
impl<'a> SPI1RST_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SPI1RST_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(SYSCFGRST_A::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12);
self.w
}
}
#[doc = "USART1 reset"]
pub type USART1RST_A = SYSCFGRST_A;
#[doc = "Reader of field `USART1RST`"]
pub type USART1RST_R = crate::R<bool, SYSCFGRST_A>;
#[doc = "Write proxy for field `USART1RST`"]
pub struct USART1RST_W<'a> {
w: &'a mut W,
}
impl<'a> USART1RST_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: USART1RST_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(SYSCFGRST_A::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14);
self.w
}
}
#[doc = "TIM15 timer reset"]
pub type TIM15RST_A = SYSCFGRST_A;
#[doc = "Reader of field `TIM15RST`"]
pub type TIM15RST_R = crate::R<bool, SYSCFGRST_A>;
#[doc = "Write proxy for field `TIM15RST`"]
pub struct TIM15RST_W<'a> {
w: &'a mut W,
}
impl<'a> TIM15RST_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM15RST_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(SYSCFGRST_A::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
self.w
}
}
#[doc = "TIM16 timer reset"]
pub type TIM16RST_A = SYSCFGRST_A;
#[doc = "Reader of field `TIM16RST`"]
pub type TIM16RST_R = crate::R<bool, SYSCFGRST_A>;
#[doc = "Write proxy for field `TIM16RST`"]
pub struct TIM16RST_W<'a> {
w: &'a mut W,
}
impl<'a> TIM16RST_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM16RST_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(SYSCFGRST_A::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17);
self.w
}
}
#[doc = "TIM17 timer reset"]
pub type TIM17RST_A = SYSCFGRST_A;
#[doc = "Reader of field `TIM17RST`"]
pub type TIM17RST_R = crate::R<bool, SYSCFGRST_A>;
#[doc = "Write proxy for field `TIM17RST`"]
pub struct TIM17RST_W<'a> {
w: &'a mut W,
}
impl<'a> TIM17RST_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM17RST_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(SYSCFGRST_A::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18);
self.w
}
}
#[doc = "TIM19 timer reset"]
pub type TIM19RST_A = SYSCFGRST_A;
#[doc = "Reader of field `TIM19RST`"]
pub type TIM19RST_R = crate::R<bool, SYSCFGRST_A>;
#[doc = "Write proxy for field `TIM19RST`"]
pub struct TIM19RST_W<'a> {
w: &'a mut W,
}
impl<'a> TIM19RST_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM19RST_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(SYSCFGRST_A::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19);
self.w
}
}
#[doc = "SDADC1 (Sigma delta ADC 1) reset"]
pub type SDADC1RST_A = SYSCFGRST_A;
#[doc = "Reader of field `SDADC1RST`"]
pub type SDADC1RST_R = crate::R<bool, SYSCFGRST_A>;
#[doc = "Write proxy for field `SDADC1RST`"]
pub struct SDADC1RST_W<'a> {
w: &'a mut W,
}
impl<'a> SDADC1RST_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SDADC1RST_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(SYSCFGRST_A::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24);
self.w
}
}
#[doc = "SDADC2 (Sigma delta ADC 2) reset"]
pub type SDADC2RST_A = SYSCFGRST_A;
#[doc = "Reader of field `SDADC2RST`"]
pub type SDADC2RST_R = crate::R<bool, SYSCFGRST_A>;
#[doc = "Write proxy for field `SDADC2RST`"]
pub struct SDADC2RST_W<'a> {
w: &'a mut W,
}
impl<'a> SDADC2RST_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SDADC2RST_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(SYSCFGRST_A::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25);
self.w
}
}
#[doc = "SDADC3 (Sigma delta ADC 3) reset"]
pub type SDADC3RST_A = SYSCFGRST_A;
#[doc = "Reader of field `SDADC3RST`"]
pub type SDADC3RST_R = crate::R<bool, SYSCFGRST_A>;
#[doc = "Write proxy for field `SDADC3RST`"]
pub struct SDADC3RST_W<'a> {
w: &'a mut W,
}
impl<'a> SDADC3RST_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SDADC3RST_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "Reset the selected module"]
#[inline(always)]
pub fn reset(self) -> &'a mut W {
self.variant(SYSCFGRST_A::RESET)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26);
self.w
}
}
impl R {
#[doc = "Bit 0 - SYSCFG and COMP reset"]
#[inline(always)]
pub fn syscfgrst(&self) -> SYSCFGRST_R {
SYSCFGRST_R::new((self.bits & 0x01) != 0)
}
#[doc = "Bit 9 - ADC interface reset"]
#[inline(always)]
pub fn adcrst(&self) -> ADCRST_R {
ADCRST_R::new(((self.bits >> 9) & 0x01) != 0)
}
#[doc = "Bit 12 - SPI 1 reset"]
#[inline(always)]
pub fn spi1rst(&self) -> SPI1RST_R {
SPI1RST_R::new(((self.bits >> 12) & 0x01) != 0)
}
#[doc = "Bit 14 - USART1 reset"]
#[inline(always)]
pub fn usart1rst(&self) -> USART1RST_R {
USART1RST_R::new(((self.bits >> 14) & 0x01) != 0)
}
#[doc = "Bit 16 - TIM15 timer reset"]
#[inline(always)]
pub fn tim15rst(&self) -> TIM15RST_R {
TIM15RST_R::new(((self.bits >> 16) & 0x01) != 0)
}
#[doc = "Bit 17 - TIM16 timer reset"]
#[inline(always)]
pub fn tim16rst(&self) -> TIM16RST_R {
TIM16RST_R::new(((self.bits >> 17) & 0x01) != 0)
}
#[doc = "Bit 18 - TIM17 timer reset"]
#[inline(always)]
pub fn tim17rst(&self) -> TIM17RST_R {
TIM17RST_R::new(((self.bits >> 18) & 0x01) != 0)
}
#[doc = "Bit 19 - TIM19 timer reset"]
#[inline(always)]
pub fn tim19rst(&self) -> TIM19RST_R {
TIM19RST_R::new(((self.bits >> 19) & 0x01) != 0)
}
#[doc = "Bit 24 - SDADC1 (Sigma delta ADC 1) reset"]
#[inline(always)]
pub fn sdadc1rst(&self) -> SDADC1RST_R {
SDADC1RST_R::new(((self.bits >> 24) & 0x01) != 0)
}
#[doc = "Bit 25 - SDADC2 (Sigma delta ADC 2) reset"]
#[inline(always)]
pub fn sdadc2rst(&self) -> SDADC2RST_R {
SDADC2RST_R::new(((self.bits >> 25) & 0x01) != 0)
}
#[doc = "Bit 26 - SDADC3 (Sigma delta ADC 3) reset"]
#[inline(always)]
pub fn sdadc3rst(&self) -> SDADC3RST_R {
SDADC3RST_R::new(((self.bits >> 26) & 0x01) != 0)
}
}
impl W {
#[doc = "Bit 0 - SYSCFG and COMP reset"]
#[inline(always)]
pub fn syscfgrst(&mut self) -> SYSCFGRST_W {
SYSCFGRST_W { w: self }
}
#[doc = "Bit 9 - ADC interface reset"]
#[inline(always)]
pub fn adcrst(&mut self) -> ADCRST_W {
ADCRST_W { w: self }
}
#[doc = "Bit 12 - SPI 1 reset"]
#[inline(always)]
pub fn spi1rst(&mut self) -> SPI1RST_W {
SPI1RST_W { w: self }
}
#[doc = "Bit 14 - USART1 reset"]
#[inline(always)]
pub fn usart1rst(&mut self) -> USART1RST_W {
USART1RST_W { w: self }
}
#[doc = "Bit 16 - TIM15 timer reset"]
#[inline(always)]
pub fn tim15rst(&mut self) -> TIM15RST_W {
TIM15RST_W { w: self }
}
#[doc = "Bit 17 - TIM16 timer reset"]
#[inline(always)]
pub fn tim16rst(&mut self) -> TIM16RST_W {
TIM16RST_W { w: self }
}
#[doc = "Bit 18 - TIM17 timer reset"]
#[inline(always)]
pub fn tim17rst(&mut self) -> TIM17RST_W {
TIM17RST_W { w: self }
}
#[doc = "Bit 19 - TIM19 timer reset"]
#[inline(always)]
pub fn tim19rst(&mut self) -> TIM19RST_W {
TIM19RST_W { w: self }
}
#[doc = "Bit 24 - SDADC1 (Sigma delta ADC 1) reset"]
#[inline(always)]
pub fn sdadc1rst(&mut self) -> SDADC1RST_W {
SDADC1RST_W { w: self }
}
#[doc = "Bit 25 - SDADC2 (Sigma delta ADC 2) reset"]
#[inline(always)]
pub fn sdadc2rst(&mut self) -> SDADC2RST_W {
SDADC2RST_W { w: self }
}
#[doc = "Bit 26 - SDADC3 (Sigma delta ADC 3) reset"]
#[inline(always)]
pub fn sdadc3rst(&mut self) -> SDADC3RST_W {
SDADC3RST_W { w: self }
}
}