softcore-rv64 0.6.0

A Rust translation of the RISC-V 64 specification
Documentation 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174

//! A set of pre-defined core configurations.
//!
//! The configuration defines which RISC-V extensions are available, as well as some other
//! parameters such as the number and granularity of PMP registers implemented by the core.
//!
//! PRs to contribute new configurations for popular cores are welcome.

use crate::raw;
use softcore_prelude::BitVector;

/// A configuration with all extensions disabled.
pub const MINIMAL: raw::Config = raw::Config {
    extensions: raw::ConfigExtensions {
        A: raw::ConfigA { supported: false },
        B: raw::ConfigB { supported: false },
        FD: raw::ConfigFD { supported: false },
        M: raw::ConfigM { supported: false },
        S: raw::ConfigS { supported: false },
        Smcntrpmf: raw::ConfigSmcntrpmf { supported: false },
        Sscofpmf: raw::ConfigSscofpmf { supported: false },
        Sstc: raw::ConfigSstc { supported: false },
        Sv32: raw::ConfigSv32 { supported: false },
        Sv39: raw::ConfigSv39 { supported: false },
        Sv48: raw::ConfigSv48 { supported: false },
        Sv57: raw::ConfigSv57 { supported: false },
        Svbare: raw::ConfigSvbare { supported: false },
        Svinval: raw::ConfigSvinval { supported: false },
        U: raw::ConfigU { supported: false },
        V: raw::ConfigV {
            supported: false,
            vlen_exp: 3,
        },
        Zaamo: raw::ConfigZaamo { supported: false },
        Zabha: raw::ConfigZabha { supported: false },
        Zalrsc: raw::ConfigZalrsc { supported: false },
        Zba: raw::ConfigZba { supported: false },
        Zbb: raw::ConfigZbb { supported: false },
        Zbc: raw::ConfigZbc { supported: false },
        Zbkb: raw::ConfigZbkb { supported: false },
        Zbkc: raw::ConfigZbkc { supported: false },
        Zbkx: raw::ConfigZbkx { supported: false },
        Zbs: raw::ConfigZbs { supported: false },
        Zca: raw::ConfigZca { supported: false },
        Zcb: raw::ConfigZcb { supported: false },
        Zcd: raw::ConfigZcd { supported: false },
        Zcf: raw::ConfigZcf { supported: false },
        Zcmop: raw::ConfigZcmop { supported: false },
        Zfa: raw::ConfigZfa { supported: false },
        Zfh: raw::ConfigZfh { supported: false },
        Zfhmin: raw::ConfigZfhmin { supported: false },
        Zfinx: raw::ConfigZfinx { supported: false },
        Zhinx: raw::ConfigZhinx { supported: false },
        Zicbom: raw::ConfigZicbom { supported: false },
        Zicboz: raw::ConfigZicboz { supported: false },
        Zicntr: raw::ConfigZicntr { supported: false },
        Zicond: raw::ConfigZicond { supported: false },
        Zifencei: raw::ConfigZifencei { supported: false },
        Zihpm: raw::ConfigZihpm { supported: false },
        Zimop: raw::ConfigZimop { supported: false },
        Zknd: raw::ConfigZknd { supported: false },
        Zkne: raw::ConfigZkne { supported: false },
        Zknh: raw::ConfigZknh { supported: false },
        Zkr: raw::ConfigZkr { supported: false },
        Zksed: raw::ConfigZksed { supported: false },
        Zksh: raw::ConfigZksh { supported: false },
        Zmmul: raw::ConfigZmmul { supported: false },
        Zvbb: raw::ConfigZvbb { supported: false },
        Zvbc: raw::ConfigZvbc { supported: false },
        Zvkb: raw::ConfigZvkb { supported: false },
        Zvknha: raw::ConfigZvknha { supported: false },
        Zvknhb: raw::ConfigZvknhb { supported: false },
        Zvksh: raw::ConfigZvksh { supported: false },
    },
    base: raw::ConfigBase {
        mtval_has_illegal_instruction_bits: false,
        writable_fiom: false,
        writable_hpm_counters: BitVector::new(0),
        writable_misa: false,
    },
    memory: raw::ConfigMemory {
        pmp: raw::ConfigPmp { count: 0, grain: 0 },
    },
    platform: raw::ConfigPlatform {
        archid: 0,
        hartid: 0,
        impid: 0,
        vendorid: 0,
        cache_block_size_exp: 0,
    },
};

/// The SiFive U74 core configuration.
pub const U74: raw::Config = raw::Config {
    extensions: raw::ConfigExtensions {
        A: raw::ConfigA { supported: true },
        B: raw::ConfigB { supported: true },
        FD: raw::ConfigFD { supported: true },
        M: raw::ConfigM { supported: true },
        S: raw::ConfigS { supported: true },
        Smcntrpmf: raw::ConfigSmcntrpmf { supported: false },
        Sscofpmf: raw::ConfigSscofpmf { supported: false },
        Sstc: raw::ConfigSstc { supported: false },
        Sv32: raw::ConfigSv32 { supported: false },
        Sv39: raw::ConfigSv39 { supported: true },
        Sv48: raw::ConfigSv48 { supported: false },
        Sv57: raw::ConfigSv57 { supported: false },
        Svbare: raw::ConfigSvbare { supported: false },
        Svinval: raw::ConfigSvinval { supported: false },
        U: raw::ConfigU { supported: true },
        V: raw::ConfigV {
            supported: false,
            vlen_exp: 3,
        },
        Zaamo: raw::ConfigZaamo { supported: false },
        Zabha: raw::ConfigZabha { supported: false },
        Zalrsc: raw::ConfigZalrsc { supported: false },
        Zba: raw::ConfigZba { supported: true },
        Zbb: raw::ConfigZbb { supported: true },
        Zbc: raw::ConfigZbc { supported: false },
        Zbkb: raw::ConfigZbkb { supported: false },
        Zbkc: raw::ConfigZbkc { supported: false },
        Zbkx: raw::ConfigZbkx { supported: false },
        Zbs: raw::ConfigZbs { supported: false },
        Zca: raw::ConfigZca { supported: true },
        Zcb: raw::ConfigZcb { supported: true },
        Zcd: raw::ConfigZcd { supported: true },
        Zcf: raw::ConfigZcf { supported: true },
        Zcmop: raw::ConfigZcmop { supported: false },
        Zfa: raw::ConfigZfa { supported: false },
        Zfh: raw::ConfigZfh { supported: false },
        Zfhmin: raw::ConfigZfhmin { supported: false },
        Zfinx: raw::ConfigZfinx { supported: false },
        Zhinx: raw::ConfigZhinx { supported: false },
        Zicbom: raw::ConfigZicbom { supported: false },
        Zicboz: raw::ConfigZicboz { supported: false },
        Zicntr: raw::ConfigZicntr { supported: true },
        Zicond: raw::ConfigZicond { supported: false },
        Zifencei: raw::ConfigZifencei { supported: false },
        Zihpm: raw::ConfigZihpm { supported: false },
        Zimop: raw::ConfigZimop { supported: false },
        Zknd: raw::ConfigZknd { supported: false },
        Zkne: raw::ConfigZkne { supported: false },
        Zknh: raw::ConfigZknh { supported: false },
        Zkr: raw::ConfigZkr { supported: false },
        Zksed: raw::ConfigZksed { supported: false },
        Zksh: raw::ConfigZksh { supported: false },
        Zmmul: raw::ConfigZmmul { supported: false },
        Zvbb: raw::ConfigZvbb { supported: false },
        Zvbc: raw::ConfigZvbc { supported: false },
        Zvkb: raw::ConfigZvkb { supported: false },
        Zvknha: raw::ConfigZvknha { supported: false },
        Zvknhb: raw::ConfigZvknhb { supported: false },
        Zvksh: raw::ConfigZvksh { supported: false },
    },
    base: raw::ConfigBase {
        mtval_has_illegal_instruction_bits: true,
        writable_fiom: true,
        writable_hpm_counters: BitVector::new(0), // TODO: check on a board
        writable_misa: false,
    },
    memory: raw::ConfigMemory {
        pmp: raw::ConfigPmp {
            count: 16,
            grain: 10,
        },
    },
    platform: raw::ConfigPlatform {
        archid: 0,
        hartid: 0,
        impid: 0,
        vendorid: 0,
        cache_block_size_exp: 0,
    },
};