Expand description
Softcore RISC-V 64
This library is a wrapper around a Rust translation of the official RISC-V executable specification. The software core can be used to test the behavior of the hardware, for instance to check if a memory access is allowed, or the register state after taking a trap. This is especially helpful to test or verify low-level software, such as kernels, hypervisors, or firmware.
The raw translation is exposed in the raw module. A more polished (and slightly more stable) interface is exposed through the Core methods.
Re-exports§
pub use raw::Core;pub use raw::ExceptionType;pub use raw::ExecutionResult;pub use raw::Privilege;pub use raw::ast;pub use softcore_prelude as prelude;
Modules§
- config
- A set of pre-defined core configurations.
- raw
- The raw translation of the official RISC-V executable specification.
- registers
- The RISC-V registers
Enums§
- Trap
- Wether or not a trap occured after executing an instruction.
Functions§
- new_
core - Returns a fresh core instance with the provided configuration.